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Makefile的編寫

1生成可執行檔案:

#source file
#原始檔,自動找所有.c和.cpp檔案,並將目標定義為同名.o檔案
SOURCE  := $(wildcard *.c) $(wildcard *.cpp)
OBJS    := $(patsubst %.c,%.o,$(patsubst %.cpp,%.o,$(SOURCE)))

#target you can change test to what you want
#目標檔名,輸入任意你想要的執行檔名
TARGET  := test

#compile and lib parameter
#編譯引數
CC      := gcc
LIBS    :=
LDFLAGS :=
DEFINES :=
INCLUDE := -I.
CFLAGS  := -g -Wall -O3 $(DEFINES) $(INCLUDE)
CXXFLAGS:= $(CFLAGS) -DHAVE_CONFIG_H

#下面的基本上不需要做任何改動了
.PHONY : everything objs clean veryclean rebuild

everything : $(TARGET)

all : $(TARGET)

objs : $(OBJS)

rebuild: veryclean everything
            
clean :  
    -rm -fr *.so
    -rm -fr *.o

veryclean : clean
    -rm -fr $(TARGET)

$(TARGET) : $(OBJS)
    $(CC) $(CXXFLAGS) -o 
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$(OBJS) $(LDFLAGS) $(LIBS)

2 生成靜態連結庫:

#target you can change test to what you want
#共享庫檔名,lib*.a
TARGET  := libtest.a

#compile and lib parameter
#編譯引數
CC      := gcc
AR      = ar
RANLIB  = ranlib
LIBS    :=
LDFLAGS :=
DEFINES :=
INCLUDE := -I.
CFLAGS  := -g -Wall -O3 $(DEFINES) $(INCLUDE)
CXXFLAGS:= $(CFLAGS) -DHAVE_CONFIG_H

#下面的基本上不需要做任何改動了

#source file
#原始檔,自動找所有.c和.cpp檔案,並將目標定義為同名.o檔案
SOURCE  := $(wildcard *.c) $(wildcard *.cpp)
OBJS    := $(patsubst %.c,%.o,$(patsubst %.cpp,%.o,$(SOURCE)))

.PHONY : everything objs clean veryclean rebuild

everything : $(TARGET)

all : $(TARGET)

objs : $(OBJS)

rebuild: veryclean everything
            
clean :
    -rm -fr *.o

veryclean : clean
    -rm -fr $(TARGET)

$(TARGET) : $(OBJS)
    $(AR) cru $(TARGET) $(OBJS)
    $(RANLIB) $(TARGET)

3 生成動態連結庫:

#target you can change test to what you want
#共享庫檔名,lib*.so
TARGET  := libtest.so

#compile and lib parameter
#編譯引數
CC      := gcc
LIBS    :=
LDFLAGS :=
DEFINES :=
INCLUDE := -I.
CFLAGS  := -g -Wall -O3 $(DEFINES) $(INCLUDE)
CXXFLAGS:= $(CFLAGS) -DHAVE_CONFIG_H
SHARE   := -fPIC -shared -o


#下面的基本上不需要做任何改動了

#source file
#原始檔,自動找所有.c和.cpp檔案,並將目標定義為同名.o檔案
SOURCE  := $(wildcard *.c) $(wildcard *.cpp)
OBJS    := $(patsubst %.c,%.o,$(patsubst %.cpp,%.o,$(SOURCE)))

.PHONY : everything objs clean veryclean rebuild

everything : $(TARGET)

all : $(TARGET)

objs : $(OBJS)

rebuild: veryclean everything
            
clean :
    -rm -fr *.o

veryclean : clean
    -rm -fr $(TARGET)

$(TARGET) : $(OBJS)
   $(CC) $(CXXFLAGS) $(SHARE) 
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$(OBJS) $(LDFLAGS) $(LIBS)

Makefile.am is a programmer-defined file and is used by automake to generate the Makefile.in file (the .am stands for automake). The configure script typically seen in source tarballs will use the Makefile.in to generate a Makefile.