技術標籤：VivadoFPGAxilinxjtag-axitcl

xlinx jtag-axi ip的tcl（全自動）讀寫指令碼：jtag_axi.tcl

proc ReadReg { Addr } {
#puts "Start reading operation"
set address [format "0x%08X" $Addr]
set len 1
create_hw_axi_txn rd_txn [get_hw_axis hw_axi_1] -type read -address $address -len $len
run_hw_axi [get_hw_axi_txns rd_txn]
set read_proc [list [report_hw_axi_txn [get_hw_axi_txns rd_txn]]]
#puts $read_proc
set read_status_value [lindex $read_proc 0 1]
delete_hw_axi_txn [get_hw_axi_txns rd_txn]
#puts $read_status_value
return $read_status_value
}

proc WriteReg { Addr data} {
set len 1
set address [format "0x%08X" $Addr]
set data [format "0x%08X" $data]
create_hw_axi_txn wr_txn [get_hw_axis hw_axi_1] -type write -address $address -len $len -data $data
run_hw_axi [get_hw_axi_txns wr_txn]
delete_hw_axi_txn [get_hw_axi_txns wr_txn]
}

open_hw_manager
connect_hw_server
open_hw_target
current_hw_device [get_hw_devices xcvu440_0]
refresh_hw_device [lindex [get_hw_devices xcvu440_0] 0]
ReadReg 0x00000000

#
set_msg_config -id {[Labtoolstcl 44-481]} -suppress
pwd
set outfile "m_tcl_out.dat"
puts $outfile
set output [open $outfile w]
set data_l [ReadReg 0x00000000]
#puts $output $data_l
set data_l [ReadReg 0x00000004]
#puts $output $data_l
# if {$cnt == 9} {
   # set data_l [concat $data_l $res_d]
   # puts $output $data_l
   # #puts $output  [format "\n" ]
   # set data_l \n
   
 # } else {
   # set data_l [concat $data_l $res_d]
 # }


set i 100
set a 0
while {$i >= 0} {

    set data_l [WriteReg $a [expr $a+100]]
    incr i -1
	incr a 4
}



set i 100
set a 0
while {$i >= 0} {

    set data_l [ReadReg $a]
    puts $output $data_l
    incr i -1
	incr a 4
}


close $output
#
close_hw_manager
 

bat呼叫：

::cd 
::dir
D:\Xilinx\Vivado\2019.2\bin\vivado.bat  -mode tcl -source jtag_axi.tcl
pause

效果(可以方便迴圈讀寫所有axi地址)：m_tcl_out.dat