DSP學習筆記----EMIF(外部儲存器介面)
阿新 • • 發佈:2018-12-18
一. EMIF介紹
CE空間:
dsp的儲存空間分為片內和片外兩種,片外空間分成四個部分,分別用於對映不同的片外裝置,即ce空間 。
The remainder of the memory map is external space that is divided into four spaces. Each space has a chip enable decode signal (called CE) that indicates an access to the selected space.
記憶體對映的其餘部分是被劃分為四個空間的外部空間。每個空間都有一個可晶片解碼訊號(稱為CE),表示對所選空間的訪問。
EMIF就是外部儲存器介面,知識DSP上的引腳,用於外接儲存器裝置。CPU與外部儲存器的連線口。在晶片上的位置如下圖。
它的結構框圖如下:
EMIF支援的儲存器:
1 非同步儲存器,包括ROM,FLASH,非同步SRAM
2 同步突發靜態儲存器(SBSRAM)
3 同步動態儲存器(SDRAM)
二. EMIF設計
EMIF的設計要針對不同的儲存器,C55x設定了4個片選訊號CE0~CE3,直接作為外部儲存器的選通訊號。
三. EMIF程式設計實驗
最重要的是配置暫存器
對於與SDRAM連線的配置過程:
配置開始->全域性控制暫存器配置EMIF時鐘->CE空間暫存器配置SDRAM空間->SDCTL配置SDRAM工作模式->SDTIM配置重新整理模式->配置擴充套件功能->配置結束
(就是通過EMIF的暫存器去控制SDRAM的介面?)
總的程式
/******************************************************************************/ /******************************************************************************/ /*----------------------------------------------------------------------------*/ /* MODULE NAME... EMIF */ /* FILENAME...... emif.c */ /* DATE CREATED.. Wed 2/4/2004 */ /* PROJECT....... write and read data between the CPU and SDRAM */ /* COMPONENT..... */ /* PREREQUISITS.. */ /*----------------------------------------------------------------------------*/ /*----------------------------------------------------------------------------*/ /* DESCRIPTION: */ /* */ /* This is an example for EMIF of C5509 */ /*----------------------------------------------------------------------------*/ #include <csl.h> #include <csl_pll.h> #include <csl_emif.h> #include <csl_chip.h> #include <stdio.h> Uint16 x; Uint32 y; CSLBool b; unsigned int datacount = 0; int databuffer[1000] ={0}; int *souraddr,*deminaddr; /*鎖相環的設定*/ PLL_Config myConfig = { 0, //IAI: the PLL locks using the same process that was underway //before the idle mode was entered 1, //IOB: If the PLL indicates a break in the phase lock, //it switches to its bypass mode and restarts the PLL phase-locking //sequence 20, //PLL multiply value; multiply 24 times 1 //Divide by 2 PLL divide value; it can be either PLL divide value //(when PLL is enabled), or Bypass-mode divide value //(PLL in bypass mode, if PLL multiply value is set to 1) }; /*SDRAM的EMIF設定*/ EMIF_Config emiffig = { 0x221, //EGCR : the MEMFREQ = 00,the clock for the memory is equal to cpu frequence // the WPE = 0 ,forbiden the writing posting when we debug the EMIF // the MEMCEN = 1,the memory clock is reflected on the CLKMEM pin // the NOHOLD = 1,HOLD requests are not recognized by the EMIF 0xFFFF, //EMI_RST: any write to this register resets the EMIF state machine 0x3FFF, //CE0_1: CE0 space control register 1 // MTYPE = 011,Synchronous DRAM(SDRAM),16-bit data bus width 0xFFFF, //CE0_2: CE0 space control register 2 0x00FF, //CE0_3: CE0 space control register 3 // TIMEOUT = 0xFF; 0x7FFF, //CE1_1: CE0 space control register 1 0xFFFF, //CE1_2: CE0 space control register 2 0x00FF, //CE1_3: CE0 space control register 3 0x7FFF, //CE2_1: CE0 space control register 1 0xFFFF, //CE2_2: CE0 space control register 2 0x00FF, //CE2_3: CE0 space control register 3 0x7FFF, //CE3_1: CE0 space control register 1 0xFFFF, //CE3_2: CE0 space control register 2 0x00FF, //CE3_3: CE0 space control register 3 0x2911, //SDC1: SDRAM control register 1 // TRC = 8 // SDSIZE = 0;SDWID = 0 // RFEN = 1 // TRCD = 2 // TRP = 2 0x0410, //SDPER : SDRAM period register // 7ns *4096 0x07FF, //SDINIT: SDRAM initialization register // any write to this register to init the all CE spaces, // do it after hardware reset or power up the C55x device 0x0131 //SDC2: SDRAM control register 2 // SDACC = 0; // TMRD = 01; // TRAS = 0101; // TACTV2ACTV = 0001; }; main() { unsigned int error=0; /*初始化CSL庫*/ CSL_init(); /*EMIF為全EMIF介面*/ CHIP_RSET(XBSR,0x0a01); /*設定系統的執行速度為120MHz*/ PLL_config(&myConfig); /*初始化DSP的外部SDRAM*/ EMIF_config(&emiffig); /*向SDRAM中寫入資料*/ souraddr = (int *)0x40000; deminaddr = (int *)0x41000; while(souraddr<deminaddr) { *souraddr++ = datacount; //address : 40000-41000 write in : 0-1000 datacount++ ; } /*讀出SDRAM中的資料*/ souraddr = (int *)0x40000; datacount = 0; while(souraddr<deminaddr) { databuffer[datacount++] = *souraddr++; printf("%d\n",databuffer[datacount-1]); if(databuffer[datacount-1]!=(datacount-1)) error++; //printf("%d",datacount-1); } if(error==0) { printf("SDRAM test completed! No Error!"); } while(1); } /******************************************************************************\ * End of pll2.c \******************************************************************************/
四.參考部落格