其實可以傳送說明CAN已經調通，無法接收是因為被過濾了
主要涉及下面兩個暫存器


啟用mask功能
ECanaMboxes.MBOX0.MSGID.bit.AME = 1;
mask的所有位都不關心
ECanaLAMRegs.LAM0.all = 0xFFFFFFFF;
這樣就能接收到0號郵箱的所有報文啦。

示例程式碼

void CAN_Init(void)
{
// eCAN control registers require read/write access using 32-bits.  Thus we
// will create a set of shadow registers for this example.  These shadow
 

// registers will be used to make sure the access is 32-bits and not 16.
   struct ECAN_REGS ECanaShadow;    //就是為了臨時儲存資料而定義的

// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2806x_SysCtrl.c file.
   InitSysCtrl();

// Step 2. Initalize GPIO:
 

// This example function is found in the F2806x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio();  // Skipped for this example

// For this example, configure CAN pins using GPIO regs here
// This function is found in F2806x_ECan.c
   InitECanGpio();  //其實就是配置30和31號引腳

// Step 3. Clear all interrupts and initialize PIE vector table:
 

// Disable CPU interrupts
   DINT;

// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2806x_PieCtrl.c file.
   InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in F2806x_DefaultIsr.c.
// This function is found in F2806x_PieVect.c.
   InitPieVectTable();
   EALLOW;
   PieVectTable.ECAN0INTA = &CAN0ISR;
   PieVectTable.TINT0 = &cpu_timer0_isr; //timer0在pie範圍內，timer1、timer2在範圍外
   EDIS;

// Step 4. Initialize the Device Peripheral. This function can be
//         found in F2806x_CpuTimers.c
   InitCpuTimers();   // For this example, only initialize the Cpu Timers
// Configure CPU-Timer 0 to interrupt every 500 milliseconds:
// 80MHz CPU Freq, 50 millisecond Period (in uSeconds)
   ConfigCpuTimer(&CpuTimer0, 90, 50);  //這裡28067的時鐘90MHz，週期50微秒
// To ensure precise timing, use write-only instructions to write to the entire register. Therefore, if any
// of the configuration bits are changed in ConfigCpuTimer and InitCpuTimers (in F2806x_CpuTimers.h), the
// below settings must also be updated.
   CpuTimer0Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0

// Step 4. Initialize all the Device Peripherals:
// This function is found in F2806x_InitPeripherals.c
// InitPeripherals(); // Not required for this example

// Step 5. User specific code, enable interrupts:

    InitECana(); // Initialize eCAN-A module

    EALLOW;

    // 3. 接收郵箱設定
        ECanaRegs.CANMD.all = 0xFFFFFC00;
        // Enable all Mailboxes */
        // Since this write is to the entire register (instead of a bit
        // field) a shadow register is not required.
        //收發成功都會觸發郵箱中斷
        ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX2.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX3.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX4.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX5.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX6.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX7.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX8.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX9.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX10.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX11.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX12.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX13.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX14.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX15.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX16.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX17.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX18.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX19.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX20.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX21.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX22.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX23.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX24.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX25.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX26.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX27.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX28.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX29.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX30.MSGCTRL.bit.DLC = 8;
        ECanaMboxes.MBOX31.MSGCTRL.bit.DLC = 8;
    // 4. 過濾配置，一定要配置濾波才能不分ID隨意接收！！！
        ECanaRegs.CANME.all = 0x0;

        ECanaMboxes.MBOX10.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX11.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX12.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX13.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX14.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX15.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX16.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX17.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX18.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX19.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX20.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX21.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX22.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX23.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX24.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX25.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX26.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX27.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX28.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX29.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX30.MSGID.bit.AME = 1;
        ECanaMboxes.MBOX31.MSGID.bit.AME = 1;

        ECanaLAMRegs.LAM10.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM11.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM12.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM13.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM14.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM15.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM16.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM17.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM18.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM19.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM20.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM21.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM22.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM23.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM24.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM25.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM26.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM27.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM28.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM29.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM30.all = 0xFFFFFFFF;
        ECanaLAMRegs.LAM31.all = 0xFFFFFFFF;

    // 5. 中斷配置
        ECanaShadow.CANMIM.all = ECanaRegs.CANMIM.all;
        ECanaShadow.CANMIM.all = 0xFFFFFC00;
        ECanaRegs.CANMIM.all = ECanaShadow.CANMIM.all;

        ECanaShadow.CANMIL.all = ECanaRegs.CANMIL.all;
        ECanaShadow.CANMIL.all = 0x000003FF;//郵箱中斷產生線上路0上
        ECanaRegs.CANMIL.all = ECanaShadow.CANMIL.all;

        ECanaRegs.CANRMP.all = 0xFFFFFC00;

        ECanaShadow.CANGIM.all = ECanaRegs.CANGIM.all;
        //ECanaShadow.CANGIM.bit.I1EN = 0;
        ECanaShadow.CANGIM.bit.I0EN = 1;//啟用針對ECAN0INT線路的所有中斷
        ECanaRegs.CANGIM.all = ECanaShadow.CANGIM.all;

        ECanaRegs.CANME.all = 0xFFFFFFFF;
    EDIS;



    //有CANMIL位決定使用9.5還是9.6號中斷
    PieCtrlRegs.PIEIER9.bit.INTx5 = 1;
    IER |= M_INT9;
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
    // Enable TINT0 in the PIE: Group 1 interrupt 7
    // Enable CPU INT1 which is connected to CPU-Timer 0:
    PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
    IER |= M_INT1;

    // Enable global Interrupts and higher priority real-time debug events:
       EINT;   // Enable Global interrupt INTM
       ERTM;   // Enable Global realtime interrupt DBGM
}