[文獻名] Fisher, Joseph A., and Stefan M. Freudenberger. “Predicting Conditional Branch Directions from Previous Runs of a Program.” In Proceedings of the Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, 85–95. ASPLOS V. New York, NY, USA: ACM, 1992. doi:10.1145/143365.143493.

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Branch prediction is an important capability for high performance CPUs,

在向量式程式碼中分支預測器效能可能很優秀，但是在系統，商用中卻不一定。

靜態動態定義：If one predicts conditional branch directions while a program is running, one is said to be doing dynamic branch prediction. If, instead, one tries to predict branch directions before the program runs, one is doing static branch prediction.

指出靜態方法資源消耗低

1.統計分支走向和頻率

2.提出百分比不是衡量預測的唯一依據，因為不同的程式有不同的分支密度，利用錯誤分支跳轉每定量指令是一個比較好的方法

The experiments reported upon here show that static prediction can be done almost as well as is possible by taking previous runs of a program, and using those runs to make decisions about which way branches will go in future runs

[文獻名] Pan, Shien-Tai, Kimming So, and Joseph T. Rahmeh. “Improving the Accuracy of Dynamic Branch Prediction Using Branch Correlation.” In Proceedings of the Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, 76–84. ASPLOS V. New York, NY, USA: ACM, 1992. doi:10.1145/143365.143490.

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1.the efficiency of handling branches is important.

2.Generally, dynamic Prediction gives better results than static prediction, but at the cost of increased hardware complexity.

3.指出了過往動態預測只注重了分支自己本身的跳轉歷史。

4.Self–history prediction schemes generally work well for scientific/engineering applications where program execution is dominated by inner-loops.

5.可以回溯到高階語言的控制。

6.由於分支相關，在後的分支可以被提前計算出跳轉

7.本質上是全域性和區域性的概念。

[文獻名] Yeh, Tse-Yu, and Yale N. Patt. “Two-Level Adaptive Training Branch Prediction.” In Proceedings of the 24th Annual International Symposium on Microarchitecture, 51–61. MICRO 24. New York, NY, USA: ACM, 1991. doi:10.1145/123465.123475.

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1 branches impede machine performance due to pipeline stalls for unresolved branches.

2 However, program profiling has to be performed in advance with certain sample data sets which may have different branch tendencies than the data sets that occur at run-time.

3 The first level is the history of the last n branches. The second is the branch behavior for the last s occurrences of that unique pattern of the last n branches

4.應注意上圖還有很多HR作為記錄分支歷史

5.指出因延遲原因，在第一級放置一個位，第二個時鐘用來預測模式

6.密集型跳轉策略：Taken，等待前面的預測出結果

7.Conditional branch佔了絕對比重

[文獻名] Yeh, Tse-Yu, and Yale N. Patt. “A Comparison of Dynamic Branch Predictors That Use Two Levels of Branch History.” In Proceedings of the 20th Annual International Symposium on Computer Architecture, 257–66. ISCA ’93. New York, NY, USA: ACM, 1993. doi:10.1145/165123.165161.

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1.全域性的概念：所有跳轉歷史聚合一起去索引

2.Per-address：為獨立地址分配跳轉歷史記錄

3.Pre-set：通過branch特點分類。

Global history schemes make effective predictions for if-thenelse branches due to their correlation with previous branches.but require higher implementation costs to be effective overall.需要長分支歷史去消除互相干擾

Per-address history schemes perform better than other schemes on floating point programs and require lower implementation costs to be effective overall.This periodic behavior is better retained with a per-address branch history table.

To be effective, however, per-set history schemes require even higher implementation costs than global history schemes due to the separate pattern history tables of each set.

[文獻名] Chang, Po-Yung, E. Hao, and Y.N. Patt. “Alternative Implementations of Hybrid Branch Predictors.” In , Proceedings of the 28th Annual International Symposium on Microarchitecture, 1995, 252–57, 1995. doi:10.1109/MICRO.1995.476833.

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聯合兩種預測器進行工作，通過選擇器進行決策，精確度比gshare高。

[文獻名] Chen, I-Cheng K., John T. Coffey, and Trevor N. Mudge. “Analysis of Branch Prediction via Data Compression.” In Proceedings of the Seventh International Conference on Architectural Support for Programming Languages and Operating Systems, 128–37. ASPLOS VII. New York, NY, USA: ACM, 1996. doi:10.1145/237090.237171.

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1.指出2級預測的結構：they have one or more shift-registers (branch history registers) to store history information in the first level and have one or more tables of 2-bit counters (pattern history tables) in their second level

2.指出馬克洛夫Markov預測機與二級預測的共性。可以作為理想狀態的2級機分析模型，評估預測的極限精度。

3.使用兩位飽和計數器的原因是因為迴圈出口只有一個。

4.However, since PPM is optimal, it is unlikely that significant improvement can be made by improving the predictor alone, except for the cases noted. Therefore, to further increase branch prediction accuracy, the focus should be on improving the information processor and the source.

[文獻名] Lee, Chih-Chieh, I-C.K. Chen, and T.N. Mudge. “The Bi-Mode Branch Predictor.” In , Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, 1997. Proceedings, 4–13, 1997. doi:10.1109/MICRO.1997.645792.

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1.The ability to minimize stalls or pipeline bubbles that may result from branches is becoming increasingly critical as microprocessor designs implement greater degrees of instruction level parallelism.

2.As a result, two-level dynamic branch predictors have been incorporated in several recent high-performance microprocessors. Perhaps the best known examples, at the time of writing, are the Pentium Pro [Gwennap95] and Alpha 21264 [Gwennap96].

3.In current designs, dynamic predictors spend large amounts of hardware to memorize this branch outcome history.

4.Global history-the outcomes of neighboring branches- is a common way to identify special branch conditions. Previous studies have shown that the global history indexed schemes achieve good performance by storing the outcomes of global history patterns in two-bit counters, e.g.,

5.gshare, randomizes the index by xor-ing the global history with the branch address

6.通過分割2級表的方法減弱混淆問題。

[文獻名] Sprangle, Eric, Robert S. Chappell, Mitch Alsup, and Yale N. Patt. “The Agree Predictor: A Mechanism for Reducing Negative Branch History Interference.” In Proceedings of the 24th Annual International Symposium on Computer Architecture, 284–91. ISCA ’97. New York, NY, USA: ACM, 1997. doi:10.1145/264107.264210.

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1.2級定義：The first level function mwas originally the value of an N-bit shift register, called the Branch History Register (BHR), that kept track of the directions of the previous N branches.

The second level is an array of PHT entries (in this paper, a-bit saturating counters) which tracks the outcomes of branches mapped to it by the first level’s indexing function. Figure 1 depicts a general two-level predictor.

2.指出混淆問題。

3.定義：We define an instance of PHT interference as a branch DCcessing a PHT entry that was previously updated by a different branch.

4.指出了電晶體數量有限，單純提高表大小不實際。

5.指出gshare是一種方法，chang：濾過簡單跳轉

6.有個別程式很差

7.使用“偏置位”識別出分支的跳轉方向，並分離不同方向的分支