1、OVERVIEW

LCD driver interface has four kinds of interface, i.e. the conventional RGB-interface, I80 Interface and  NTSC/PAL standard TV  Encoder Interface and IT-R BT. 601 interface. The DISPLAY controller supports up to 5 overlay image windows. Overlay image windows support various color format, 16 level alpha blending, color key, x-y position control, soft scrolling, variable window size, and etc.The DISPLAY controller supports various color formats such as RGB (1BPP to 24 BPP), and YCbCr 4:4:4(only local bus).

LCD 驅動介面有四種介面，如傳統的RGB 介面，I80 介面，NTSC/PAL 標準TV 編碼器介面和IT-R BT.601 介面。顯示控制器支援5 層影象視窗。覆蓋影象視窗支援多種顏色格式、16 級alpha 混合、color key，橫縱座標位置控制，軟動，可變視窗尺寸等等。顯示控制器支援各種顏色格式，如RGB（1BPPto24BPP），YcbCr4：4：4.

The DISPLAY controller is used to transfer the video data and to generate the necessary control signals such as,
RGB_VSYNC, RGB_HSYNC, RGB_VCLK, RGB_VDEN, and SYS_CS0(as well as the control signals). DISPLAY
controller has the data ports for video data, which are RGB_VD[23:0], SYS_VD[17:0], and TV_OUT as shown in
Figure 14-1.

顯示控制器用來轉換視訊資料，併產生需要的控制訊號，如，RGB_VSYNC, RGB_HSYNC, RGB_VCLK,
RGB_VDEN 和SYS-CS0（作為控制訊號）。顯示控制器有視訊資料埠，這些資料埠是RGB_VD[23:0]和
SYS_VD[17:0]，TV_OUT 如圖14-1 所示。

2、FEATURES

Video Output Interface ：介面

RGB IF (Parallel)
RGB IF (Serial)
I80 Interface
TV Encoder Interface (NTSC, PAL standard)
ITU-R BT.601 interface (YUV422 8bit)

3、FUNCTIONAL DESCRIPTION

3.1、BRIEF OF THE SUB-BLOCK子模組簡要

The DISPLAY controller consists of a VSFR, VDMA, VPRCS, VTIME, and video clock generator。

顯示控制器由這些子模組組成。

The VSFR includes programmable register sets and two-256x 25 palette（調色盤） memories.

The VDMA is a dedicated display DMA.

The VPRCS receives the video data from VDMA and sends the video data through the data ports to the display device (LCD) after converting them into a suitable data format, for example 8-bit per pixel mode (8 BPP Mode) or 16-bit per pixel mode (16 BPP Mode).

VPRCS 接收VDMA 發出的視訊資料，將其轉換到適合的資料格式，如8 位畫素或16 位畫素後，將視訊資料傳送到顯示裝置上。

The VTIME consists of programmable logic to support the variable requirement of interface timing and rates  commonly found in different LCD drivers.

3.2、DATA FLOW資料流

FIFO is present in the VDMA.The DISPLAY controller has five FIFOs because it needs to support the overlay window display mode.

顯示控制器有5 個FIFO ，因為顯示控制器需要支援覆蓋視窗顯示模式。

3.3、INTERFACE介面

DISPLAY controller supports 4 types of display device. One type is the conventional RGB-interface, which uses
RGB data, Vertical/horizontal sync, data valid signal and data sync clock. The Second type is I80 Interface which
uses address, data, chip select, read/write control and register/status indicating signal. In this type of LCD driver it
has a frame buffer and has the function of self-refresh, therefore DISPLAY controller updates one still image by
writing only one time to the LCD. The Third type is ITU-R BT.601 interface. ITU-R BT.601 interface uses YUV
data, Vertical/horizontal sync, optional Field signal, data valid signal and data sync clock. The fourth type is FIFO
interface with TV Encoder.

顯示控制器支援4 個型別的顯示裝置。1 為傳統的RGB 介面型別，使用RGB 資料，垂直/水平同步，資料有效訊號資料同步時鐘。第二種型別是I80 介面，使用地址，資料，晶片選擇，以及讀/寫控制和暫存器/狀態指示訊號。在這種型別的LCD 裝置內有一個幀緩衝區，可以進行自動重新整理。因此，顯示控制器一次只能向LCD 上傳一個靜態影象。第三種類型是ITU_R BT.601 介面，使用YUV 資料，垂直/水平同步，可選欄位訊號，資料有效訊號和資料同步時鐘。第四種類型是有TV 編碼器的FIFO 介面。

3.4、OVERVIEW OF THE COLOR DATA顏色資料概要

舉個例子：

NOTES:
1. AEN : Transparency value selection bit
AEN = 0 : ALPHA0_R/G/B values are applied
AEN = 1 : ALPHA1_R/G/B values are applied
If per-pixel blending is set, then this pixel would be blended with alpha value selected by AEN. Alpha value is selected by SFR value as ALPHA0_R, ALPHA0_G, ALPHA0_B, ALPHA1_R, ALPHA1_G, ALPHA1_B. For more information refer to description of SFR.
2. D[23:16] = Red data, D[15:8] = Green data, D[7:0] = Blue data

4、PALETTE USAGE調色盤的使用

4.1、Palette Configuration and Format Control調色盤配置和格式控制

The DISPLAY controller can support the 256 colors palette for various selection of color mapping.
The user can select 256 colors from the 25-bit colors through these four formats.
256 color palette consist of the 256(depth) × 25-bit DPSRAM. Palette supports 8:8:8, 6:6:6, 5:6:5(R:G:B), and etc
formats.

顯示控制器支援256 種顏色的調色盤，可以進行顏色對映的各種的選擇。使用者可以通過四種格式從25 位顏色中選擇256 顏色。256 顏色調色包由256x25 位DPSRAM 組成。調色盤支援8:8:8,6:6:6,5:6:5(R:G:B)等格式。

For example of A:5:5:5 format, write palette as specified in Table 14-2 and then connect VD pin to TFT LCD
panel( R(5)=VD[23:19], G(5)=VD[15:11], and B(5)=VD[7:3] ). The AEN bit controls the blending function enable or
disable. At the end, Set Window Palette Control (W0PAL, case window0) register to 0’b101.

例如A:5:5:5 格式，如表14-2 所示寫調色盤，將VD 管腳與TFT LCD 控制板相連
（R(5)=VD[23:19],G(5)=[15:11],B(5)=[7:3]）.AEN 位控制混合功能可以使能或禁止。最後，設定視窗調色盤控制暫存器位0’b101.

4.2、WINDOW BLENDING視窗混合

The main function of the VPRCS module is window blending. DISPLAY controller has 5 window layers and the
details are described below.

VPRCS 模組的主要功能是視窗混合。顯示控制器有5 個視窗層，具體層的內容接下來會有具體的描述。

4.3、COLOR-KEY FUNCTION

5、VTIME CONTROLLER OPERATION     VTIME 控制器操作

VTIME is mainly divided into two blocks. One is VTIME_RGB_TV for RGB interface, ITU-R601 interface and TV
Encoder Interface timing control. The other is for I80 interface timing control.

VTIME 主要分為兩個模組。一個是VTIME_RGB_TV 模組，用於RGB 介面，ITU_R601 介面和TV編碼器介面時序控制。另一個是用於I80 介面時序控制的模組。

5.1、RGB Interface

   The VTIME generates the control signals such as, RGB_VSYNC, RGB_HSYNC, RGB_VDEN and RGB_VCLK
signal for RGB interface. These control signals are highly related with the configuration on the VIDTCON0/1/2
registers in the VSFR register. 

   Based on these programmable configurations of the display control registers inVSFR, the VTIME module can generate the programmable control signals suitable for the support of manydifferent types of display device.

  The RGB_VSYNC signal is asserted to cause the LCD's line pointer to start over at the top of the display. The
RGB_VSYNC and RGB_HSYNC pulse generation is controlled by the configuration of both the HOZVAL field and
the LINEVAL registers. 

The HOZVAL and LINEVAL can be determined by the size of the LCD panel according to
the following equations:
HOZVAL = (Horizontal display size) -1
LINEVAL = (Vertical display size) –1
The rate of RGB_VCLK signal can be controlled by the CLKVAL field in the VIDCON0 register. The table below
defines the relationship of RGB_VCLK and CLKVAL. The minimum value of CLKVAL is 1.
RGB_VCLK (Hz) =HCLK/ (CLKVAL+1) where CLKVAL >= 1

VTIME 產生控制訊號，如RGBZ-VSYNC,RGB_HSYNC,RGB_VDEN 和RGB_VCLK 訊號。這些控制訊號與VSFR 暫存器內的VIDTCON0/1/2 暫存器的配置有很大的關係。

根據VSFR 內顯示控制暫存器的可程式設計配置，VTIME 模組可以產生程式控制訊號，這些控制訊號適合於很多不同型別的顯示裝置。
RGB_VSYNC 訊號用來導致LCD 行指標從顯示的頂層開始覆蓋。RGB_VSYNC 和RGB_HSYNC 跳動產生由HOZVAL 區域和LINEVAL 暫存器的配置控制。HOZVAL 和LINEVAL 由LCD 顯示屏的尺寸決定，具
體等式如下：
HOZVAL=(水平顯示尺寸)-1
LINEVAL=(垂直顯示尺寸)-1
RGB_VCLK 訊號的速率可以由VIDCON0 暫存器內的CLKVAL 領域控制。RGB_VCLK 和CLKVAL之間的關係見表14-4. CLKVAL 最小值為1.
RGB_VCLK(Hz)=HCLK/(CLKVAL+1) CLKVAL>=1

The frame rate is calculated as follows;
Frame Rate = 1/ [ { (VSPW+1) + (VBPD+1) + (LIINEVAL + 1) + (VFPD+1) } x {(HSPW+1) + (HBPD +1)
+ (HFPD+1) + (HOZVAL + 1) } x { ( CLKVAL+1 ) / ( Frequency of Clock source ) } ]

5.2、LDI Command Control

LDI can receive command and data. Command refers to index for the selection of SFR in LDI. In control signal for
command and data, only SYS_RS signal has different operation. Generally, SYS_RS is polarity of ‘1’ for
command issue and vice versa.
DISPLAY Controller has two kinds of command control. One is auto command and the other is normal command.
Auto command is issued automatically (i.e. without S/W control) at a predefined rate (rate = 2,4, 6 ..30. Rate = 4
means auto command are send to LDI at the end of every 4-image-frames). Normal command is issued by S/W
control.

LDI 可以接收命令和資料。命令表示LDI 內的SFR 選擇的索引。在命令和資料的控制訊號內，只有SYS_RS 訊號有不同的操作。通常SYS_RS 的命令極性是1，反之亦然。
顯示控制器有兩種命令控制形式。一種是自動命令控制形式，另一種是常規命令控制形式。自動命令
在預定速率內自動發出。通過S/W 控制可以發出常規命令。

5.3、RGB INTERFACE IO