1. 程式人生 > >TMS320F28335之外部中斷和自定義中斷

TMS320F28335之外部中斷和自定義中斷

  • 外部中斷
    外部中斷和其他模組中斷中斷原理一樣,也是先設定中斷級,然後PIE級,最後CPU級,外部中斷的中斷暫存器在中斷標頭檔案中,中斷觸發設定在中斷C檔案中,外部中斷作為一個單獨的模組使用。28335支援8 個可遮蔽的外部中斷(XINT1–XINT7, XNMI)。XNMI 可設定成INT13 或者CPU 的NMI 中斷。每一箇中斷可設定成負邊沿、正邊沿或者正負邊沿觸發,並且設定啟用或禁用(包括XNMI 在內)。XINT1, XINT2,和XNMI 還包含一個16 位自由執行的遞增計數器,當檢測到一個有效的中斷邊沿時,該計數器復位為0。這個計數器可被用於中斷精確計時。與281x 器件不同,28335沒有專用的外部中斷引腳。XINT1,XINT2 和XINT 中斷可設定成GPIO0-GPIO31 引腳的輸入。XINT3–XINT7 中斷可設定成GPIO32-GPIO63 引腳的輸入。外部中斷控制暫存器的位定義如下圖所示。
    這裡寫圖片描述


    這裡寫圖片描述
    由上可知,配置外部中斷的步驟為:
    1、配置GPIO為外部中斷引腳。
    2、設定外部中斷觸發條件。
    3、開啟PIE中斷。
    4、設定中斷向量表。
    5、開啟CPU中斷。
    6、編寫中斷函式,清除PIE中斷標誌位。

  • 外部中斷標頭檔案DSP2833x_XIntrupt.h程式如下

// TI File $Revision: /main/1 $
// Checkin $Date: August 18, 2006   13:52:39 $
//###########################################################################
//
// FILE:  DSP2833x_XIntrupt.h
// // TITLE: DSP2833x Device 外部中斷暫存器定義. // //########################################################################### // $TI Release: DSP2833x/DSP2823x C/C++ Header Files V1.31 $ // $Release Date: August 4, 2009 $ //########################################################################### #ifndef DSP2833x_XINTRUPT_H
#define DSP2833x_XINTRUPT_H #ifdef __cplusplus extern "C" { #endif //--------------------------------------------------------------------------- //外部中斷控制暫存器位定義 struct XINTCR_BITS { Uint16 ENABLE:1; // 0 中斷使能 Uint16 rsvd1:1; // 1 保留 Uint16 POLARITY:2; // 3:2 上升沿、下降沿 Uint16 rsvd2:12; //15:4 保留 }; //外部中斷控制暫存器 union XINTCR_REG { Uint16 all; struct XINTCR_BITS bit; //外部中斷控制暫存器位定義 }; //NMI不可遮蔽中斷控制暫存器位定義 struct XNMICR_BITS { Uint16 ENABLE:1; // 0 中斷使能 Uint16 SELECT:1; // 1 int13選擇訊號源 Uint16 POLARITY:2; // 3:2 上升沿、下降沿 Uint16 rsvd2:12; // 15:4 保留 }; //NMI不可遮蔽中斷控制暫存器 union XNMICR_REG { Uint16 all; struct XNMICR_BITS bit; //NMI不可遮蔽中斷控制暫存器位定義 }; //--------------------------------------------------------------------------- // 外部中斷暫存器檔案: // struct XINTRUPT_REGS { union XINTCR_REG XINT1CR; //外部中斷1控制暫存器 union XINTCR_REG XINT2CR; //外部中斷2控制暫存器 union XINTCR_REG XINT3CR; //外部中斷3控制暫存器 union XINTCR_REG XINT4CR; //外部中斷4控制暫存器 union XINTCR_REG XINT5CR; //外部中斷5控制暫存器 union XINTCR_REG XINT6CR; //外部中斷6控制暫存器 union XINTCR_REG XINT7CR; //外部中斷7控制暫存器 union XNMICR_REG XNMICR; //NMI不可遮蔽中斷控制暫存器 Uint16 XINT1CTR; //外部中斷1計數器 Uint16 XINT2CTR; //外部中斷2計數器 Uint16 rsvd[5]; //保留 Uint16 XNMICTR; //XNMI控制暫存器 }; //--------------------------------------------------------------------------- // 外部中斷引用 & 函式宣告: // extern volatile struct XINTRUPT_REGS XIntruptRegs; #ifdef __cplusplus } #endif /* extern "C" */ #endif // end of DSP2833x_XINTF_H definition //=========================================================================== // End of file. //===========================================================================
  • 外部中斷設定檔案DSP2833x_XIntrupt.c如下
//---------------------------------------------------------------------------
//  DSP2833x_XIntrupt.C     外部中斷1初始化
//---------------------------------------------------------------------------
/***************************************************************************/
//包含標頭檔案
//***************************************************************************/

#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File

//初始外部中斷
//這個函式外部中斷初始化到一個已知狀態
void InitXIntrupt(void)
{
    XIntruptRegs.XINT1CR.bit.POLARITY = 0;      //中斷1產生在下降沿
    XIntruptRegs.XINT1CR.bit.ENABLE = 0x1;      //使能外部中斷1
}

//===========================================================================
// No more.
//===========================================================================
  • 自定義中斷檔案
    28335除了使用預設的中斷配置外還可以使用自定義的中斷配置檔案,其中DSP2833x_DefaultIsr.h、DSP2833x_DefaultIsr.c和DSP2833x_PieVect.c這三個檔案是預設中斷配置檔案,而DSP2833x_SWPrioritizedIsrLevels.h、DSP2833x_SWPrioritizedDefaultIsr.c、DSP2833x_SWPrioritizedPieVect.c這三個檔案是TI提供給軟體設計者對中斷的配置重新定義的,第一個是中斷優先順序,第二個是中斷程式,第三個是中斷向量表。兩種配置的功能都是相同的,自定義不過是可以改變優先順序。

  • 預設中斷優先順序檔案DSP2833x_SWPrioritizedIsrLevels.h程式如下,修改暫存器優先順序即可自定義中斷

// TI File $Revision: /main/2 $
// Checkin $Date: April 4, 2007   14:25:21 $
//###########################################################################
//
// FILE:    DSP2833x_SWPrioritizedIsrLevels.h
//
// TITLE:   DSP28 Devices 軟體中斷優先順序服務例程 
//          級別定義.
//
//###########################################################################
// $TI Release: DSP2833x/DSP2823x C/C++ Header Files V1.31 $
// $Release Date: August 4, 2009 $
//###########################################################################

#ifndef DSP2833x_SW_PRIORITZIED_ISR_H
#define DSP2833x_SW_PRIORITZIED_ISR_H


#ifdef __cplusplus
extern "C" {
#endif


//-------------------------------------------------------------------------------
// 為2833x裝置分配中斷暫存器:
//-------------------------------------------------------------------------------
// 中斷可以啟用/禁止使用CPU中斷暫存器
// (IER) and the PIE 中斷使能暫存器 (PIEIER1 to PIEIER12). 
//-------------------------------------------------------------------------------
//-------------------------------------------------------------------------------
// 設定全域性中斷優先順序(IER 暫存器):
//-------------------------------------------------------------------------------
//使用者必須為每個CPU 設定適當的優先順序中斷  
//這稱為“全域性”優先順序 
//優先順序之間的必須是一個數字1(最高),16(最低),不使用的值為0   
//大小也會減少程式碼不包括ISR的不習慣
//注意:下面的優先順序是用來計算IER
//中斷面具MINT1 MINT16
//
//
// 註釋: 這裡顯示的優先順序可能沒有意義真實的應用程式中。這只是出於演示目的! ! !
// 
//       有意義的使用者應該改變這些值 
//       他們的應用.
//
// 0  = 不使用
// 1  = 優先順序最高
// ...
// 16 = 優先順序最低
#define INT1PL      2        // Group1 Interrupts (PIEIER1)
#define INT2PL      1        // Group2 Interrupts (PIEIER2)
#define INT3PL      4        // Group3 Interrupts (PIEIER3)
#define INT4PL      2        // Group4 Interrupts (PIEIER4)
#define INT5PL      2        // Group5 Interrupts (PIEIER5)
#define INT6PL      3        // Group6 Interrupts (PIEIER6)
#define INT7PL      0        // reserved
#define INT8PL      0        // reserved
#define INT9PL      3        // Group9 Interrupts (PIEIER9)
#define INT10PL     0        // reserved
#define INT11PL     0        // reserved
#define INT12PL     0        // reserved
#define INT13PL     4        // XINT13
#define INT14PL     4        // INT14 (TINT2)
#define INT15PL     4        // DATALOG
#define INT16PL     4        // RTOSINT

//-------------------------------------------------------------------------------
// 設定每組的中斷優先順序(PIEIER1 to PIEIER12 暫存器):
//-------------------------------------------------------------------------------
// 使用者必須為每組設定適當的中斷優先順序
// 這個稱為“組”的優先順序
// 必須是一個數字1 (最高) to 8 (最低). 或者為0的值
// be entered for reserved interrupts or interrupts that are not used. This
// will also reduce code size by not including ISR's that are not used:
//
// Note: The priority levels below are used to calculate the following
//       PIEIER register interrupt masks:
//                           MG11 to MG18
//                           MG21 to MG28
//                           MG31 to MG38
//                           MG41 to MG48
//                           MG51 to MG58
//                           MG61 to MG68
//                           MG71 to MG78
//                           MG81 to MG88
//                           MG91 to MG98
//                           MG101 to MG108
//                           MG111 to MG118
//                           MG121 to MG128
//
// Note: The priority levels shown here may not make sense in a 
//       real application.  This is for demonstration purposes only!!!
// 
//       The user should change these to values that make sense for 
//       their application.
//
// 0  = 不使用
// 1  = 最高優先順序
// ...
// 8  = 最低優先順序
//
#define G11PL       7        // SEQ1INT     (ADC)
#define G12PL       6        // SEQ2INT     (ADC)
#define G13PL       0        // reserved
#define G14PL       1        // XINT1       (External)
#define G15PL       3        // XINT2       (External)
#define G16PL       2        // ADCINT      (ADC)
#define G17PL       1        // TINT0       (CPU Timer 0)
#define G18PL       5        // WAKEINT     (WD/LPM)

#define G21PL       4        // EPWM1_TZINT (ePWM1 Trip)
#define G22PL       3        // EPWM2_TZINT (ePWM2 Trip)
#define G23PL       2        // EPWM3_TZINT (ePWM3 Trip)
#define G24PL       1        // EPWM4_TZINT (ePWM4 Trip)
#define G25PL       5        // EPWM5_TZINT (ePWM5 Trip)
#define G26PL       6        // EPWM6_TZINT (ePWM6 Trip)
#define G27PL       0        // reserved
#define G28PL       0        // reserved

#define G31PL       4        // EPWM1_INT   (ePWM1 Int)
#define G32PL       1        // EPWM2_INT   (ePWM2 Int)
#define G33PL       1        // EPWM3_INT   (ePWM3 Int)
#define G34PL       2        // EPWM4_INT   (ePWM4 Int)
#define G35PL       2        // EPWM5_INT   (ePWM5 Int)
#define G36PL       1        // EPWM6_INT   (ePWM6 Int)
#define G37PL       0        // reserved
#define G38PL       0        // reserved

#define G41PL       2        // ECAP1_INT   (eCAP1 Int)
#define G42PL       1        // ECAP2_INT   (eCAP2 Int)
#define G43PL       3        // ECAP3_INT   (eCAP3 Int)
#define G44PL       3        // ECAP4_INT   (eCAP4 Int)
#define G45PL       5        // ECAP5_INT   (eCAP5 Int)
#define G46PL       5        // ECAP6_INT   (eCAP6 Int)
#define G47PL       0        // reserved
#define G48PL       0        // reserved

#define G51PL       2        // EQEP1_INT   (eQEP1 Int)
#define G52PL       1        // EQEP2_INT   (eQEP2 Int)
#define G53PL       0        // reserved
#define G54PL       0        // reserved
#define G55PL       0        // reserved
#define G56PL       0        // reserved
#define G57PL       0        // reserved
#define G58PL       0        // reserved

#define G61PL       3        // SPIRXINTA   (SPI-A)
#define G62PL       1        // SPITXINTA   (SPI-A)
#define G63PL       4        // MRINTB      (McBSP-B)
#define G64PL       6        // MXINTB      (McBSP-B)          
#define G65PL       2        // MRINTA      (McBSP-A)
#define G66PL       1        // MXINTA      (McBSP-A)                  
#define G67PL       0        // reserved
#define G68PL       0        // reserved         

#define G71PL       5        // DINTCH1     (DMA)
#define G72PL       4        // DINTCH2     (DMA)
#define G73PL       4        // DINTCH3     (DMA)
#define G74PL       2        // DINTCH4     (DMA)
#define G75PL       3        // DINTCH5     (DMA)
#define G76PL       1        // DINTCH6     (DMA)
#define G77PL       0        // reserved
#define G78PL       0        // reserved

#define G81PL       1        // I2CINT1A    (I2C-A)
#define G82PL       2        // I2CINT2A    (I2C-A)
#define G83PL       0        // reserved
#define G84PL       0        // reserved
#define G85PL       4        // SCIRXINTC   (SCI-C)
#define G86PL       3        // SCITXINTC   (SCI-C)
#define G87PL       0        // reserved
#define G88PL       0        // reserved

#define G91PL       1        // SCIRXINTA   (SCI-A) 優先順序最高
#define G92PL       5        // SCITXINTA   (SCI-A)
#define G93PL       3        // SCIRXINTB   (SCI-B)
#define G94PL       4        // SCITXINTB   (SCI-B)
#define G95PL       1        // ECAN0INTA   (ECAN-A)
#define G96PL       1        // ECAN1INTA   (ECAN-A)
#define G97PL       2        // ECAN0INTB   (ECAN-B)
#define G98PL       4        // ECAN1INTB   (ECAN-B)          

#define G101PL      0        // reserved
#define G102PL      0        // reserved
#define G103PL      0        // reserved
#define G104PL      0        // reserved
#define G105PL      0        // reserved
#define G106PL      0        // reserved
#define G107PL      0        // reserved
#define G108PL      0        // reserved

#define G111PL      0        // reserved
#define G112PL      0        // reserved
#define G113PL      0        // reserved
#define G114PL      0        // reserved
#define G115PL      0        // reserved
#define G116PL      0        // reserved
#define G117PL      0        // reserved
#define G118PL      0        // reserved

#define G121PL      5        // XINT3       (External)
#define G122PL      3        // XINT4       (External)
#define G123PL      2        // XINT5       (External)
#define G124PL      2        // XINT6       (External)
#define G125PL      1        // XINT7       (External)
#define G126PL      0        // reserved
#define G127PL      6        // LVF         (FPA32)
#define G128PL      1        // LUF         (FPA32)


// 修改程式碼不需要下面這條線 
//-------------------------------------------------------------------------------
// 自動生成IER中斷入口從MINT1 to MINT16:
//

// 開始 of MINT1:
#if (INT1PL == 0)
#define  MINT1_1PL    ~(1 << 0)
#else
#define  MINT1_1PL    0xFFFF
#endif

#if (INT2PL >= INT1PL) || (INT2PL == 0)
#define  MINT1_2PL   ~(1 << 1)
#else
#define  MINT1_2PL   0xFFFF
#endif

#if (INT3PL >= INT1PL) || (INT3PL == 0)
#define  MINT1_3PL   ~(1 << 2)
#else
#define  MINT1_3PL   0xFFFF
#endif

#if (INT4PL >= INT1PL) || (INT4PL == 0)
#define  MINT1_4PL   ~(1 << 3)
#else
#define  MINT1_4PL   0xFFFF
#endif

#if (INT5PL >= INT1PL) || (INT5PL == 0)
#define  MINT1_5PL   ~(1 << 4)
#else
#define  MINT1_5PL   0xFFFF
#endif

#if (INT6PL >= INT1PL) || (INT6PL == 0)
#define  MINT1_6PL   ~(1 << 5)
#else
#define  MINT1_6PL   0xFFFF
#endif

#if (INT7PL >= INT1PL) || (INT7PL == 0)
#define  MINT1_7PL   ~(1 << 6)
#else
#define  MINT1_7PL   0xFFFF
#endif

#if (INT8PL >= INT1PL) || (INT8PL == 0)
#define  MINT1_8PL   ~(1 << 7)
#else
#define  MINT1_8PL   0xFFFF
#endif

#if (INT9PL >= INT1PL) || (INT9PL == 0)
#define  MINT1_9PL   ~(1 << 8)
#else
#define  MINT1_9PL   0xFFFF
#endif

#if (INT10PL >= INT1PL) || (INT10PL == 0)
#define  MINT1_10PL   ~(1 << 9)
#else
#define  MINT1_10PL   0xFFFF
#endif

#if (INT11PL >= INT1PL) || (INT11PL == 0)
#define  MINT1_11PL   ~(1 << 10)
#else
#define  MINT1_11PL   0xFFFF
#endif

#if (INT12PL >= INT1PL) || (INT12PL == 0)
#define  MINT1_12PL   ~(1 << 11)
#else
#define  MINT1_12PL   0xFFFF
#endif

#if (INT13PL >= INT1PL) || (INT13PL == 0)
#define  MINT1_13PL   ~(1 << 12)
#else
#define  MINT1_13PL   0xFFFF
#endif

#if (INT14PL >= INT1PL) || (INT14PL == 0)
#define  MINT1_14PL   ~(1 << 13)
#else
#define  MINT1_14PL   0xFFFF
#endif

#if (INT15PL >= INT1PL) || (INT15PL == 0)
#define  MINT1_15PL   ~(1 << 14)
#else
#define  MINT1_15PL   0xFFFF
#endif

#if (INT16PL >= INT1PL) || (INT16PL == 0)
#define  MINT1_16PL   ~(1 << 15)
#else
#define  MINT1_16PL   0xFFFF
#endif

#define  MINT1    (MINT1_1PL  & MINT1_2PL  & MINT1_3PL  & MINT1_4PL  & \
                   MINT1_5PL  & MINT1_6PL  & MINT1_7PL  & MINT1_8PL  & \
                   MINT1_9PL  & MINT1_10PL & MINT1_11PL & MINT1_12PL & \
                   MINT1_13PL & MINT1_14PL & MINT1_15PL & MINT1_16PL)
// 結束 Of MINT1.

// 開始 of MINT2:
#if (INT1PL >= INT2PL) || (INT1PL == 0)
#define  MINT2_1PL    ~(1 << 0)
#else
#define  MINT2_1PL    0xFFFF
#endif

#if (INT2PL == 0)
#define  MINT2_2PL   ~(1 << 1)
#else
#define  MINT2_2PL   0xFFFF
#endif

#if (INT3PL >= INT2PL) || (INT3PL == 0)
#define  MINT2_3PL   ~(1 << 2)
#else
#define  MINT2_3PL   0xFFFF
#endif

#if (INT4PL >= INT2PL) || (INT4PL == 0)
#define  MINT2_4PL   ~(1 << 3)
#else
#define  MINT2_4PL   0xFFFF
#endif

#if (INT5PL >= INT2PL) || (INT5PL == 0)
#define  MINT2_5PL   ~(1 << 4)
#else
#define  MINT2_5PL   0xFFFF
#endif

#if (INT6PL >= INT2PL) || (INT6PL == 0)
#define  MINT2_6PL   ~(1 << 5)
#else
#define  MINT2_6PL   0xFFFF
#endif

#if (INT7PL >= INT2PL) || (INT7PL == 0)
#define  MINT2_7PL   ~(1 << 6)
#else
#define  MINT2_7PL   0xFFFF
#endif

#if (INT8PL >= INT2PL) || (INT8PL == 0)
#define  MINT2_8PL   ~(1 << 7)
#else
#define  MINT2_8PL   0xFFFF
#endif

#if (INT9PL >= INT2PL) || (INT9PL == 0)
#define  MINT2_9PL   ~(1 << 8)
#else
#define  MINT2_9PL   0xFFFF
#endif

#if (INT10PL >= INT2PL) || (INT10PL == 0)
#define  MINT2_10PL   ~(1 << 9)
#else
#define  MINT2_10PL   0xFFFF
#endif

#if (INT11PL >= INT2PL) || (INT11PL == 0)
#define  MINT2_11PL   ~(1 << 10)
#else
#define  MINT2_11PL   0xFFFF
#endif

#if (INT12PL >= INT2PL) || (INT12PL == 0)
#define  MINT2_12PL   ~(1 << 11)
#else
#define  MINT2_12PL   0xFFFF
#endif

#if (INT13PL >= INT2PL) || (INT13PL == 0)
#define  MINT2_13PL   ~(1 << 12)
#else
#define  MINT2_13PL   0xFFFF
#endif

#if (INT14PL >= INT2PL) || (INT14PL == 0)
#define  MINT2_14PL   ~(1 << 13)
#else
#define  MINT2_14PL   0xFFFF
#endif

#if (INT15PL >= INT2PL) || (INT15PL == 0)
#define  MINT2_15PL   ~(1 << 14)
#else
#define  MINT2_15PL   0xFFFF
#endif

#if (INT16PL >= INT2PL) || (INT16PL == 0)
#define  MINT2_16PL   ~(1 << 15)
#else
#define  MINT2_16PL   0xFFFF
#endif

#define  MINT2    (MINT2_1PL  & MINT2_2PL  & MINT2_3PL  & MINT2_4PL  & \
                   MINT2_5PL  & MINT2_6PL  & MINT2_7PL  & MINT2_8PL  & \
                   MINT2_9PL  & MINT2_10PL & MINT2_11PL & MINT2_12PL & \
                   MINT2_13PL & MINT2_14PL & MINT2_15PL & MINT2_16PL)
// 結束 Of MINT2.

// 開始 of MINT3:
#if (INT1PL >= INT3PL) || (INT1PL == 0)
#define  MINT3_1PL    ~(1 << 0)
#else
#define  MINT3_1PL    0xFFFF
#endif

#if (INT2PL >= INT3PL) || (INT2PL == 0)
#define  MINT3_2PL   ~(1 << 1)
#else
#define  MINT3_2PL   0xFFFF
#endif

#if (INT3PL == 0)
#define  MINT3_3PL   ~(1 << 2)
#else
#define  MINT3_3PL   0xFFFF
#endif

#if (INT4PL >= INT3PL) || (INT4PL == 0)
#define  MINT3_4PL   ~(1 << 3)
#else
#define  MINT3_4PL   0xFFFF
#endif

#if (INT5PL >= INT3PL) || (INT5PL == 0)
#define  MINT3_5PL   ~(1 << 4)
#else
#define  MINT3_5PL   0xFFFF
#endif

#if (INT6PL >= INT3PL) || (INT6PL == 0)
#define  MINT3_6PL   ~(1 << 5)
#else
#define  MINT3_6PL   0xFFFF
#endif

#if (INT7PL >= INT3PL) || (INT7PL == 0)
#define  MINT3_7PL   ~(1 << 6)
#else
#define  MINT3_7PL   0xFFFF
#endif

#if (INT8PL >= INT3PL) || (INT8PL == 0)
#define  MINT3_8PL   ~(1 << 7)
#else
#define  MINT3_8PL   0xFFFF
#endif

#if (INT9PL >= INT3PL) || (INT9PL == 0)
#define  MINT3_9PL   ~(1 << 8)
#else
#define  MINT3_9PL   0xFFFF
#endif

#if (INT10PL >= INT3PL) || (INT10PL == 0)
#define  MINT3_10PL   ~(1 << 9)
#else
#define  MINT3_10PL   0xFFFF
#endif

#if (INT11PL >= INT3PL) || (INT11PL == 0)
#define  MINT3_11PL   ~(1 << 10)
#else
#define  MINT3_11PL   0xFFFF
#endif

#if (INT12PL >= INT3PL) || (INT12PL == 0)
#define  MINT3_12PL   ~(1 << 11)
#else
#define  MINT3_12PL   0xFFFF
#endif

#if (INT13PL >= INT3PL) || (INT13PL == 0)
#define  MINT3_13PL   ~(1 << 12)
#else
#define  MINT3_13PL   0xFFFF
#endif

#if (INT14PL >= INT3PL) || (INT14PL == 0)
#define  MINT3_14PL   ~(1 << 13)
#else
#define  MINT3_14PL   0xFFFF
#endif

#if (INT15PL >= INT3PL) || (INT15PL == 0)
#define  MINT3_15PL   ~(1 << 14)
#else
#define  MINT3_15PL   0xFFFF
#endif

#if (INT16PL >= INT3PL) || (INT16PL == 0)
#define  MINT3_16PL   ~(1 << 15)
#else
#define  MINT3_16PL   0xFFFF
#endif

#define  MINT3    (MINT3_1PL  & MINT3_2PL  & MINT3_3PL  & MINT3_4PL  & \
                   MINT3_5PL  & MINT3_6PL  & MINT3_7PL  & MINT3_8PL  & \
                   MINT3_9PL  & MINT3_10PL & MINT3_11PL & MINT3_12PL & \
                   MINT3_13PL & MINT3_14PL & MINT3_15PL & MINT3_16PL)
// 結束 Of MINT3.

// 開始 of MINT4:
#if (INT1PL >= INT4PL) || (INT1PL == 0)
#define  MINT4_1PL    ~(1 << 0)
#else
#define  MINT4_1PL    0xFFFF
#endif

#if (INT2PL >= INT4PL) || (INT2PL == 0)
#define  MINT4_2PL   ~(1 << 1)
#else
#define  MINT4_2PL   0xFFFF
#endif

#if (INT3PL >= INT4PL) || (INT3PL == 0)
#define  MINT4_3PL   ~(1 << 2)
#else
#define  MINT4_3PL   0xFFFF
#endif

#if (INT4PL == 0)
#define  MINT4_4PL   ~(1 << 3)
#else
#define  MINT4_4PL   0xFFFF
#endif

#if (INT5PL >= INT4PL) || (INT5PL == 0)
#define  MINT4_5PL   ~(1 << 4)
#else
#define  MINT4_5PL   0xFFFF
#endif

#if (INT6PL >= INT4PL) || (INT6PL == 0)
#define  MINT4_6PL   ~(1 << 5)
#else
#define  MINT4_6PL   0xFFFF
#endif

#if (INT7PL >= INT4PL) || (INT7PL == 0)
#define  MINT4_7PL   ~(1 << 6)
#else
#define  MINT4_7PL   0xFFFF
#endif

#if (INT8PL >= INT4PL) || (INT8PL == 0)
#define  MINT4_8PL   ~(1 << 7)
#else
#define  MINT4_8PL   0xFFFF
#endif

#if (INT9PL >= INT4PL) || (INT9PL == 0)
#define  MINT4_9PL   ~(1 << 8)
#else
#define  MINT4_9PL   0xFFFF
#endif

#if (INT10PL >= INT4PL) || (INT10PL == 0)
#define  MINT4_10PL   ~(1 << 9)
#else
#define  MINT4_10PL   0xFFFF
#endif

#if (INT11PL >= INT4PL) || (INT11PL == 0)
#define  MINT4_11PL   ~(1 << 10)
#else
#define  MINT4_11PL   0xFFFF
#endif

#if (INT12PL >= INT4PL) || (INT12PL == 0)
#define  MINT4_12PL   ~(1 << 11)
#else
#define  MINT4_12PL   0xFFFF
#endif

#if (INT13PL >= INT4PL) || (INT13PL == 0)
#define  MINT4_13PL   ~(1 << 12)
#else
#define  MINT4_13PL   0xFFFF
#endif

#if (INT14PL >= INT4PL) || (INT14PL == 0)
#define  MINT4_14PL   ~(1 << 13)
#else
#define  MINT4_14PL   0xFFFF
#endif

#if (INT15PL >= INT4PL) || (INT15PL == 0)
#define  MINT4_15PL   ~(1 << 14)
#else
#define  MINT4_15PL   0xFFFF
#endif

#if (INT16PL >= INT4PL) || (INT16PL == 0)
#define  MINT4_16PL   ~(1 << 15)
#else
#define  MINT4_16PL   0xFFFF
#endif

#define  MINT4    (MINT4_1PL  & MINT4_2PL  & MINT4_3PL  & MINT4_4PL  & \
                   MINT4_5PL  & MINT4_6PL  & MINT4_7PL  & MINT4_8PL  & \
                   MINT4_9PL  & MINT4_10PL & MINT4_11PL & MINT4_12PL & \
                   MINT4_13PL & MINT4_14PL & MINT4_15PL & MINT4_16PL)
// 結束 Of MINT4.

// 開始 of MINT5:
#if (INT1PL >= INT5PL) || (INT1PL == 0)
#define  MINT5_1PL    ~(1 << 0)
#else
#define  MINT5_1PL    0xFFFF
#endif

#if (INT2PL >= INT5PL) || (INT2PL == 0)
#define  MINT5_2PL   ~(1 << 1)
#else
#define  MINT5_2PL   0xFFFF
#endif

#if (INT3PL >= INT5PL) || (INT3PL == 0)
#define  MINT5_3PL   ~(1 << 2)
#else
#define  MINT5_3PL   0xFFFF
#endif

#if (INT4PL >= INT5PL) || (INT4PL == 0)
#define  MINT5_4PL   ~(1 << 3)
#else
#define  MINT5_4PL   0xFFFF
#endif

#if (INT5PL == 0)
#define  MINT5_5PL   ~(1 << 4)
#else
#define  MINT5_5PL   0xFFFF
#endif

#if (INT6PL >= INT5PL) || (INT6PL == 0)
#define  MINT5_6PL   ~(1 << 5)
#else
#define  MINT5_6PL   0xFFFF
#endif

#if (INT7PL >= INT5PL) || (INT7PL == 0)
#define  MINT5_7PL   ~(1 << 6)
#else
#define  MINT5_7PL   0xFFFF
#endif

#if (INT8PL >= INT5PL) || (INT8PL == 0)
#define  MINT5_8PL   ~(1 << 7)
#else
#define  MINT5_8PL   0xFFFF
#endif

#if (INT9PL >= INT5PL) || (INT9PL == 0)
#define  MINT5_9PL   ~(1 << 8)
#else
#define  MINT5_9PL   0xFFFF
#endif

#if (INT10PL >= INT5PL) || (INT10PL == 0)
#define  MINT5_10PL   ~(1 << 9)
#else
#define  MINT5_10PL   0xFFFF
#endif

#if (INT11PL >= INT5PL) || (INT11PL == 0)
#define  MINT5_11PL   ~(1 << 10)
#else
#define  MINT5_11PL   0xFFFF
#endif

#if (INT12PL >= INT5PL) || (INT12PL == 0)
#define  MINT5_12PL   ~(1 << 11)
#else
#define  MINT5_12PL   0xFFFF
#endif

#if (INT13PL >= INT5PL) || (INT13PL == 0)
#define  MINT5_13PL   ~(1 << 12)
#else
#define  MINT5_13PL   0xFFFF
#endif

#if (INT14PL >= INT5PL) || (INT14PL == 0)
#define  MINT5_14PL   ~(1 << 13)
#else
#define  MINT5_14PL   0xFFFF
#endif

#if (INT15PL >= INT5PL) || (INT15PL == 0)
#define  MINT5_15PL   ~(1 << 14)
#else
#define  MINT5_15PL   0xFFFF
#endif

#if (INT16PL >= INT5PL) || (INT16PL == 0)
#define  MINT5_16PL   ~(1 << 15)
#else
#define  MINT5_16PL   0xFFFF
#endif

#define  MINT5    (MINT5_1PL  & MINT5_2PL  & MINT5_3PL  & MINT5_4PL  & \
                   MINT5_5PL  & MINT5_6PL  & MINT5_7PL  & MINT5_8PL  & \
                   MINT5_9PL  & MINT5_10PL & MINT5_11PL & MINT5_12PL & \
                   MINT5_13PL & MINT5_14PL & MINT5_15PL & MINT5_16PL)
// 結束 Of MINT5.

// 開始 of MINT6:
#if (INT1PL >= INT6PL) || (INT1PL == 0)
#define  MINT6_1PL    ~(1 << 0)
#else
#define  MINT6_1PL    0xFFFF
#endif

#if (INT2PL >= INT6PL) || (INT2PL == 0)
#define  MINT6_2PL   ~(1 << 1)
#else
#define  MINT6_2PL   0xFFFF
#endif

#if (INT3PL >= INT6PL) || (INT3PL == 0)
#define  MINT6_3PL   ~(1 << 2)
#else
#define  MINT6_3PL   0xFFFF
#endif

#if (INT4PL >= INT6PL) || (INT4PL == 0)
#define  MINT6_4PL   ~(1 << 3)
#else
#define  MINT6_4PL   0xFFFF
#endif

#if (INT5PL >= INT6PL) || (INT5PL == 0)
#define  MINT6_5PL   ~(1 << 4)
#else
#define  MINT6_5PL   0xFFFF
#endif

#if (INT6PL == 0)
#define  MINT6_6PL   ~(1 << 5)
#else
#define  MINT6_6PL   0xFFFF
#endif

#if (INT7PL >= INT6PL) || (INT7PL == 0)
#define  MINT6_7PL   ~(1 << 6)
#else
#define  MINT6_7PL   0xFFFF
#endif

#if (INT8PL >= INT6PL) || (INT8PL == 0)
#define  MINT6_8PL   ~(1 << 7)
#else
#define  MINT6_8PL   0xFFFF
#endif

#if (INT9PL >= INT6PL) || (INT9PL == 0)
#define  MINT6_9PL   ~(1 << 8)
#else
#define  MINT6_9PL   0xFFFF
#endif

#if (INT10PL >= INT6PL) || (INT10PL == 0)
#define  MINT6_10PL   ~(1 << 9)
#else
#define  MINT6_10PL   0xFFFF
#endif

#if (INT11PL >= INT6PL) || (INT11PL == 0)
#define  MINT6_11PL   ~(1 << 10)
#else
#define  MINT6_11PL   0xFFFF
#endif

#if (INT12PL >= INT6PL) || (INT12PL == 0)
#define  MINT6_12PL   ~(1 << 11)
#else
#define  MINT6_12PL   0xFFFF
#endif

#if (INT13PL >= INT6PL) || (INT13PL == 0)
#define  MINT6_13PL   ~(1 << 12)
#else
#define  MINT6_13PL   0xFFFF
#endif

#if (INT14PL >= INT6PL) || (INT14PL == 0)
#define  MINT6_14PL   ~(1 << 13)
#else
#define  MINT6_14PL   0xFFFF
#endif

#if (INT15PL >= INT6PL) || (INT15PL == 0)
#define  MINT6_15PL   ~(1 << 14)
#else
#define  MINT6_15PL   0xFFFF
#endif

#if (INT16PL >= INT6PL) || (INT16PL == 0)
#define  MINT6_16PL   ~(1 << 15)
#else
#define  MINT6_16PL   0xFFFF
#endif

#define  MINT6    (MINT6_1PL  & MINT6_2PL  & MINT6_3PL  & MINT6_4PL  & \
                   MINT6_5PL  & MINT6_6PL  & MINT6_7PL  & MINT6_8PL  & \
                   MINT6_9PL  & MINT6_10PL & MINT6_11PL & MINT6_12PL & \
                   MINT6_13PL & MINT6_14PL & MINT6_15PL & MINT6_16PL)
// 結束 Of MINT6.

// 開始 of MINT7:
#if (INT1PL >= INT7PL) || (INT1PL == 0)
#define  MINT7_1PL    ~(1 << 0)
#else
#define  MINT7_1PL    0xFFFF
#endif

#if (INT2PL >= INT7PL) || (INT2PL == 0)
#define  MINT7_2PL   ~(1 << 1)
#else
#define  MINT7_2PL   0xFFFF
#endif

#if (INT3PL >= INT7PL) || (INT3PL == 0)
#define  MINT7_3PL   ~(1 << 2)
#else
#define  MINT7_3PL   0xFFFF
#endif

#if (INT4PL >= INT7PL) || (INT4PL == 0)
#define  MINT7_4PL   ~(1 << 3)
#else
#define  MINT7_4PL   0xFFFF
#endif

#if (INT5PL >= INT7PL) || (INT5PL == 0)
#define  MINT7_5PL   ~(1 << 4)
#else
#define  MINT7_5PL   0xFFFF
#endif

#if (INT6PL >= INT7PL) || (INT6PL == 0)
#define  MINT7_6PL   ~(1 << 5)
#else
#define  MINT7_6PL   0xFFFF
#endif

#if (INT7PL == 0)
#define  MINT7_7PL   ~(1 << 6)
#else
#define  MINT7_7PL   0xFFFF
#endif

#if (INT8PL >= INT7PL) || (INT8PL == 0)
#define  MINT7_8PL   ~(1 << 7)
#else
#define  MINT7_8PL   0xFFFF
#endif

#if (INT9PL >= INT7PL) || (INT9PL == 0)
#define  MINT7_9PL   ~(1 << 8)
#else
#define  MINT7_9PL   0xFFFF
#endif

#if (INT10PL >= INT7PL) || (INT10PL == 0)
#define  MINT7_10PL   ~(1 << 9)
#else
#define  MINT7_10PL   0xFFFF
#endif

#if (INT11PL >= INT7PL) || (INT11PL == 0)
#define  MINT7_11PL   ~(1 << 10)
#else
#define  MINT7_11PL   0xFFFF
#endif

#if (INT12PL >= INT7PL) || (INT12PL == 0)
#define  MINT7_12PL   ~(1 << 11)
#else
#define  MINT7_12PL   0xFFFF
#endif

#if (INT13PL >= INT7PL) || (INT13PL == 0)
#define  MINT7_13PL   ~(1 << 12)
#else
#define  MINT7_13PL   0xFFFF
#endif

#if (INT14PL >= INT7PL) || (INT14PL == 0)
#define  MINT7_14PL   ~(1 << 13)
#else
#define  MINT7_14PL   0xFFFF
#endif

#if (INT15PL >= INT7PL) || (INT15PL == 0)
#define  MINT7_15PL   ~(1 << 14)
#else

            
           

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