[RK3399][Android7.1] Display模組配置螢幕時序方法
阿新 • • 發佈:2019-02-15
OS: Android 7.1
Board: Firefly-RK3399
Kernel: v4.4.55
rk3399平臺上提供了兩種方法來配置屏的時序引數,uboot也一樣。
時序引數寫在原始碼中:
比如當前用的edp屏, dts只有背光,gpio這些配置。
rk3399-firefly-edp.dts:
edp_panel: edp-panel {
compatible = "lg,lp079qx1-sp0v";
bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
backlight = <&backlight>;
......
power_ctr: power_ctr {
rockchip,debug = <0>;
lcd_en: lcd-en {
gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <& lcd_panel_enable>;
rockchip,delay = <20>;
};
lcd_rst: lcd-rst {
gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_panel_reset> ;
rockchip,delay = <20>;
};
};
};
對應的時序引數配置是在panel-simple.c中
static const struct of_device_id platform_of_match[] = {
......
{
.compatible = "lg,lp079qx1-sp0v",
.data = &lg_lp079qx1_sp0v,
},
......
};
lg_lp079qx1_sp0v:
static const struct panel_desc lg_lp079qx1_sp0v = {
.modes = &lg_lp079qx1_sp0v_mode,
.num_modes = 1,
.size = {
.width = 129,
.height = 171,
},
.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
};
lg_lp079qx1_sp0v_mode:
static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
.clock = 200000,
.hdisplay = 1536,
.hsync_start = 1536 + 12,
.hsync_end = 1536 + 12 + 16,
.htotal = 1536 + 12 + 16 + 48,
.vdisplay = 2048,
.vsync_start = 2048 + 8,
.vsync_end = 2048 + 8 + 4,
.vtotal = 2048 + 8 + 4 + 8,
.vrefresh = 60,
.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
};
時序寫在dts中:
這個方式是和rk3288一樣的,比如dts中的mipi屏配置。
rk3399-firefly-mipi.dsti:
&mipi_dsi {
status = "okay";
dsi_panel: panel {
compatible ="simple-panel-dsi";
status = "okay";
......
disp_timings: display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <80000000>;
hactive = <768>;
vactive = <1024>;
hsync-len = <20>; //20, 50
hback-porch = <130>; //50, 56
hfront-porch = <150>;//50, 30
vsync-len = <40>;
vback-porch = <130>;
vfront-porch = <136>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};