/*此模組的作用是用來根據波特率等資訊的配合來採集資料*/
module rx_control_module(
									clk,rst_n,
									H2L_Sig,Rx_pin_in,bps_clk,rx_en_sig,
									count_sig,rx_data,rx_done_sig
//									bps_clk1
);

input				clk;
input				rst_n;

input				H2L_Sig;
input				Rx_pin_in;
input				bps_clk;
input				rx_en_sig;

//output			bps_clk1;
output			count_sig;
output	[7:0]	rx_data;//忽略起始位與校驗位
output			rx_done_sig;
//-------------------------------------------------
reg	[3:0]	i;
reg	[7:0]	rdata;
reg			iscount;
reg			isdone;
//--------------------------------------------------

 
[email protected](posedge clk or negedge rst_n)
	if(!rst_n)
		begin
			i <= 4'd0;
			rdata <= 8'd0;
			iscount <= 1'd0;
			isdone <= 1'd0;
		end
	else if(rx_en_sig)
		case(i)
			4'd0:
				if(H2L_Sig)	begin i <= i + 1'b1;iscount <= 1'b1;end
				
			4'd1:
				if(bps_clk) begin i<= i + 1'b1;end
				
			4'd2,4'd3,4'd4,4'd5,4'd6,4'd7,4'd8,4'd9://有效資料
				if(bps_clk) begin i <= i + 1'b1; rdata[i-2] <= Rx_pin_in;end
				
			4'd10://校驗位
				if(bps_clk) begin i <= i+1'b1;  end
			
			4'd11://結束位
				if(bps_clk) begin i <= i+1'b1; end
			
			4'd12:
				begin i <= i +1'b1;isdone <= 1'b1;iscount <= 1'b0; end
				
			4'd13:
				begin i <= 1'b0;isdone <= 1'b0; end
		endcase
//----------------------------------------------------------
assign count_sig = iscount;
assign rx_done_sig = isdone;//當8位資料接收完畢後，拉高該標誌位，（接收完成標誌為，高電平有效）
assign rx_data = rdata;
//assign bps_clk1 = bps_clk;	
			
endmodule