飛思卡爾微控制器DZ60---時鐘初始化
阿新 • • 發佈:2019-02-06
/* Derivative peripheral declarations */ #include "derivative.h" /* Definitions and function prototypes */ #include "DZ60_init.h" //FEI切換到PEE模式,外部晶振=4MHZ,匯流排頻率=8MHZ( 中文手冊,P144頁) /* External crystal oscillator = 4MHz */ /* FOR PEE mode: Bus_Clock = (1/2)*[(Osc_clock/Ref_div)*VCO_div]/(Bus_div) = 8MHz */ #define BUS_DIV 0 /* Bus divider = 0, divide by 1 */ #define REF_DIV 2 /* Reference divider = 2, divide by 4 */ #define VCO_DIV 4 /* VCO divider = 4, multiply by 16 */ void MCG_Init(void) { SOPT1_COPT = 0; //1 //a) MCGC2_BDIV = BUS_DIV; //0 MCGC2_RANGE = 1; MCGC2_HGO = 1; MCGC2_EREFS = 1; MCGC2_ERCLKEN = 1; //b) while(!MCGSC_OSCINIT); //迴圈檢測,表明EREFS選擇的晶體已經完成初始化 //c) MCGC1_CLKS = 0X02; MCGC1_RDIV = 0X07; MCGC1_IREFS = 0; //d) while( MCGSC_IREFST ); //e) while( (MCGSC_CLKST ^ 0X02)); //2 //a) MCGC2_LP = 1; //b) MCGC1_RDIV = REF_DIV;//2; //c) MCGC3_PLLS = 1; MCGC3_VDIV = VCO_DIV;//4; //d) MCGC2_LP = 0; //e) while(!MCGSC_PLLST); //f) while(!MCGSC_LOCK); //3 //a) MCGC1_CLKS = 0X00; //b) while((MCGSC_CLKST ^ 0X03)); }
/****************************************************************************************** | FUNCTION NAME : MCU_SetBusClock | CALLED BY : xxxx | PRECONDITIONS : xxxx | INPUT PARAMETERS : xxxx | OUTPUT PARAMETERS: xxxx | RETURN VALUE : xxxx | DESCRIPTION : set MCGOUT and bus frequency,BDIV = 1, VDIV = 16, RDIV = 4, OSC = 4.332MHz | MCGOUT = [(OSC / RDIV) * VDIV] / BDIV; | MCGOUT = [(4.332MHz / 4) * 16] / 1 = 17.328MHz; | Bus frequency = MCGOUT / 2 = 8.664MHz | NOTE : xxxx |*******************************************************************************************/ void MCU_SetBusClock(void) /* XOSC 4.332MHZ,BUS clock 8.664MHZ */ { //SOPT1 = 0; /* STOP WATCH DOG */ SOPT1_COPT =3; /* enable watchdog 1s timeout*/ /*After RESET start in FEI Mode FEI > FBE *************************************** Set MCGC2: BDIV[6:7] | RANGE | HGO | LP | EFERS | ERCLKEN | EREFSTEN | */ MCGC2 = 0X36; while(!MCGSC_OSCINIT); /* Wait till OSCINIT in MCGSC is one */ _asm SEI; /* MUST BLOCK INTERRUPTS */ MCGC1 = 0XB8; /* Set MCGC1:| CLKS[6:7] | RDIV[3:5] | IREFS | IRCLKEN | IREFSTEN | */ while(MCGSC_IREFST); /* Wait till IRFEST in MCGSC is zero */ while((MCGSC_CLKST)^(0x02));/* Wait till external clock source is selected */ /* FBE > BLPE **************************************** */ MCGC2_LP = 1; MCGC1 = 0X90; /* Set the range of frequency divider 4.332m/4 (1mhz~2mhz) */ MCGC3 = 0X44; while(!MCGSC_PLLST); /* Wait till Source of PLLS clock is set to PLL clock */ /* BLPE > PBE **************************************** */ /* Clear LP to switch to PBE Mode*/ MCGC2_LP = 0; while(!MCGSC_LOCK); /* Wait for PLL to lock */ /* PBE > PEE ***************************************** */ /* Select clock source */ MCGC1 = 0X10; while((MCGSC_CLKST)^(0x03));/* Check if output of the PLL is selected as current clock mode */ _asm CLI; /* CAN ENEBLE INTERRUPTS */ }