很清晰的解讀i2c協議【轉】
轉自:https://blog.csdn.net/weixin_41718085/article/details/79376823
轉載:http://dpinglee.blog.163.com/blog/static/14409775320112239374615/
1.I2C協議
2條雙向序列線,一條資料線SDA,一條時鐘線SCL。
SDA傳輸資料是大端傳輸,每次傳輸8bit,即一位元組。
支援多主控(multimastering),任何時間點只能有一個主控。
總線上每個裝置都有自己的一個addr,共7個bit,廣播地址全0.
系統中可能有多個同種晶片,為此addr分為固定部分和可程式設計部份,細節視晶片而定,看datasheet。
1.1 I2C位傳輸
資料傳輸:SCL為高電平時,SDA線若保持穩定,那麼SDA上是在傳輸資料bit;
若SDA發生跳變,則用來表示一個會話的開始或結束(後面講)
資料改變:SCL為低電平時,SDA線才能改變傳輸的bit
1.2 I2C開始和結束訊號
開始訊號:SCL為高電平時,SDA由高電平向低電平跳變,開始傳送資料。
結束訊號:SCL為高電平時,SDA由低電平向高電平跳變,結束傳送資料。
1.3 I2C應答訊號
Master每傳送完8bit資料後等待Slave的ACK。
即在第9個clock,若從IC發ACK,SDA會被拉低。
若沒有ACK,SDA會被置高,這會引起Master發生RESTART或STOP流程,如下所示:
1.4 I2C寫流程
寫暫存器的標準流程為:
1. Master發起START
2. Master傳送I2C addr(7bit)和w操作0(1bit),等待ACK
3. Slave傳送ACK
4. Master傳送reg addr(8bit),等待ACK
5. Slave傳送ACK
6. Master傳送data(8bit),即要寫入暫存器中的資料,等待ACK
7. Slave傳送ACK
8. 第6步和第7步可以重複多次,即順序寫多個暫存器
9. Master發起STOP
寫一個暫存器
1.5 I2C讀流程
讀暫存器的標準流程為:
1. Master傳送I2Caddr(7bit)和 W操作1(1bit),等待ACK
2. Slave傳送ACK
3. Master傳送reg addr(8bit),等待ACK
4. Slave傳送ACK
5. Master發起START
6. Master傳送I2C addr(7bit)和 R操作1(1bit),等待ACK
7. Slave傳送ACK
8. Slave傳送data(8bit),即暫存器裡的值
9. Master傳送ACK
10. 第8步和第9步可以重複多次,即順序讀多個暫存器
讀一個暫存器
讀多個暫存器
2. PowerPC的I2C實現
Mpc8560的CCSR中控制I2C的暫存器共有6個。
2.1 I2CADR 地址暫存器
CPU也可以是I2C的Slave,CPU的I2C地址有 I2CADR指定
2.2 I2CFDR 頻率設定暫存器
The serial bit clock frequency of SCL is equal to the CCB clock divided by the divider.
用來設定I2C匯流排頻率
2.3 I2CCR 控制暫存器
MEN: Module Enable. 置1時,I2C模組使能
MIEN:Module Interrupt Enable. 置1時,I2C中斷使能。
MSTA:Master/slave mode. 1 Master mode,0 Slave mode.
當1->0時,CPU發起STOP訊號
當0->1時,CPU發起START訊號
MTX:Transmit/receive mode select.0 Receive mode,1 Transmit mode
TXAK:Transfer acknowledge. 置1時,CPU在9th clock傳送ACK拉低SDA
RSTA:Repeat START. 置1時,CPU傳送REPEAT START
BCST:置1,CPU接收廣播資訊(資訊的slave addr為7個0)
2.4 I2CSR 狀態暫存器
MCF:0 Byte transfer is in process
1 Byte transfer is completed
MAAS:當CPU作為Slave時,若I2CDR與會話中Slaveaddr匹配,此bit被置1
MBB:0 I2C bus idle
1 I2C bus busy
MAL:若置1,表示仲裁失敗
BCSTM:若置1,表示接收到廣播資訊
SRW:When MAAS is set, SRW indicates the value of the R/W command bit of the calling address, which is sent from the master.
0 Slave receive, master writing to slave
1 Slave transmit, master reading from slave
MIF:Module interrupt. The MIF bit is set when an interrupt is pending, causing a processor interrupt request(provided I2CCR[MIEN] is set)
RXAK:若置1,表示收到了ACK
2.5 I2CDR 資料暫存器
這個暫存器儲存CPU將要傳輸的資料。
3. PPC-Linux中I2C的實現
核心程式碼中,通過I2C匯流排存取暫存器的函式都在檔案drivers/i2c/busses/i2c-mpc.c中
最重要的函式是mpc_xfer.
{
struct i2c_msg *pmsg;
int i;
int ret = 0;
unsigned long orig_jiffies = jiffies;
struct mpc_i2c *i2c = i2c_get_adapdata(adap);
mpc_i2c_start(i2c); // 設定I2CCR[MEN], 使能I2C module
/* Allow bus up to 1s to become not busy */
//一直讀I2CSR[MBB],等待I2C匯流排空閒下來
while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
if (signal_pending(current)) {
pr_debug("I2C: Interrupted\n");
writeccr(i2c, 0);
return -EINTR;
}
if (time_after(jiffies, orig_jiffies + HZ)) {
pr_debug("I2C: timeout\n");
if (readb(i2c->base + MPC_I2C_SR) ==
(CSR_MCF | CSR_MBB | CSR_RXAK))
mpc_i2c_fixup(i2c);
return -EIO;
}
schedule();
}
for (i = 0; ret >= 0 && i < num; i++) {
pmsg = &msgs[i];
pr_debug("Doing %s %d bytes to 0x%02x - %d of %d messages\n",
pmsg->flags & I2C_M_RD ? "read" : "write",
pmsg->len, pmsg->addr, i + 1, num); //根據訊息裡的flag進行讀操作或寫操作 if (pmsg->flags & I2C_M_RD)
ret = mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
else
ret = mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
}
mpc_i2c_stop(i2c); //保證為I2CCSR[MSTA]為0,保證能觸發STOP
return (ret < 0) ? ret : num;
}
const u8 * data, int length, int restart)
{
int i;
unsigned timeout = i2c->adap.timeout;
u32 flags = restart ? CCR_RSTA : 0;
/* Start with MEN */ //以防萬一,保證I2C模組使能起來
if (!restart)
writeccr(i2c, CCR_MEN);
/* Start as master */ //寫了I2CCR[CCR_MSTA],觸發CPU發起START訊號
writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
/* Write target byte */ //CPU傳送一個位元組,slave I2C addr和0 (寫操作bit)
writeb((target << 1), i2c->base + MPC_I2C_DR);
if (i2c_wait(i2c, timeout, 1) < 0) //等待slave 發ACK
return -1;
for (i = 0; i < length; i++) {
/* Write data byte */
writeb(data[i], i2c->base + MPC_I2C_DR); //CPU接著發資料,包括reg addr和data
if (i2c_wait(i2c, timeout, 1) < 0) //等待slave 發ACK
return -1;
}
return 0;
}
{
unsigned long orig_jiffies = jiffies;
u32 x;
int result = 0;
if (i2c->irq == 0)
{ //迴圈讀I2CSR,直到I2CSR[MIF]置1
while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
schedule();
if (time_after(jiffies, orig_jiffies + timeout)) {
pr_debug("I2C: timeout\n");
writeccr(i2c, 0);
result = -EIO;
break;
}
}
x = readb(i2c->base + MPC_I2C_SR);
writeb(0, i2c->base + MPC_I2C_SR);
} else {
/* Interrupt mode */
result = wait_event_interruptible_timeout(i2c->queue,
(i2c->interrupt & CSR_MIF), timeout * HZ);
if (unlikely(result < 0)) {
pr_debug("I2C: wait interrupted\n");
writeccr(i2c, 0);
} else if (unlikely(!(i2c->interrupt & CSR_MIF))) {
pr_debug("I2C: wait timeout\n");
writeccr(i2c, 0);
result = -ETIMEDOUT;
}
x = i2c->interrupt;
i2c->interrupt = 0;
}
if (result < 0)
return result;
if (!(x & CSR_MCF)) {
pr_debug("I2C: unfinished\n");
return -EIO;
}
if (x & CSR_MAL) { //仲裁失敗
pr_debug("I2C: MAL\n");
return -EIO;
}
if (writing && (x & CSR_RXAK)) {//寫後沒收到ACK
pr_debug("I2C: No RXAK\n");
/* generate stop */
writeccr(i2c, CCR_MEN);
return -EIO;
}
return 0;
}
static int mpc_read(struct mpc_i2c *i2c, int target,
u8 * data, int length, int restart)
{
unsigned timeout = i2c->adap.timeout;
int i;
u32 flags = restart ? CCR_RSTA : 0;
/* Start with MEN */ //以防萬一,保證I2C模組使能
if (!restart)
writeccr(i2c, CCR_MEN);
/* Switch to read - restart */ //注意這裡,再次把CCR_MSTA置1,再觸發 START
writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
/* Write target address byte - this time with the read flag set */
//CPU傳送slave I2C addr和讀操作1
writeb((target << 1) | 1, i2c->base + MPC_I2C_DR);
//等待Slave發ACK if (i2c_wait(i2c, timeout, 1) < 0)
return -1;
if (length) {
if (length == 1)
writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
else //為什麼不置 TXAK
writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA);
/* Dummy read */
readb(i2c->base + MPC_I2C_DR);
}
for (i = 0; i < length; i++) {
if (i2c_wait(i2c, timeout, 0) < 0)
return -1;
/* Generate txack on next to last byte */
//注意這裡TXAK置1,表示CPU每收到1byte資料後,會發送ACK
if (i == length - 2)
writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
/* Generate stop on last byte */
//注意這裡CCR_MSTA [1->0] CPU會觸發STOP
if (i == length - 1)
writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK);
data[i] = readb(i2c->base + MPC_I2C_DR);
}
return length;
}