來自：https://forums.xilinx.com/t5/7-Series-FPGA-%E5%85%B6%E4%BB%96-FPGA-%E5%99%A8%E4%BB%B6/zynq7000-020-synthesis-LUT-overflow/m-p/886425#M892

Hi,

     我在使用zynq7000 020時，使用ECC糾錯演算法邏輯，綜合下來LUT資源所需為73580，而020中的LUT資源為53000，超出將近40%。使用Flow_AreaOptimized_high策略替換預設策略，效果甚微，請問還有沒有什麼別的辦法？謝謝！

註冊日期： ‎05-27-2018

回覆： zynq7000 020 synthesis LUT overflow

Hi @andy_lvjing,

     你在implemention那一欄下面選擇report utilization,看一下你設計的哪一個模組佔用了大量的LUT資源，是LUT as logic還是LUT as memory佔用的多，再考慮一下從哪方面優化自己的設計。

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修改時間 ‎08-31-2018 05:14 PM

Hi,

   我們主要佔用的是LUT Logic，因為ECC演算法中用了大量的異或單元：

修改時間 ‎09-03-2018 06:06 PM

Hi @andy_lvjing，

    先參考一下這個連結, 你的設計裡面資源利用不均，演算法也需要優化。

來自：https://forums.xilinx.com/t5/7-Series-FPGAs/How-can-I-utilize-Memory-LUTs-as-a-Logic-LUT/m-p/639178/highlight/true#M12418

Hi,

I am using Kintex-7 XC7K160T-2FFG676C device with Vivado 2013.4. Since I'm not able to implement my design due over resource utilization, I have attached resourse utilization report generated after synthesis.

As per synthesis utilization report, I can see only 14% utilization of LUT as Memory and logic LUT utilization exceeds 100%. So is there a way that Memory LUTs can be utilized as logic LUTs?

Thanks,

Vijay

o answer the original question...

All LUTs are able to be used as logic. Rougly 1/4 of them can also be used as memory. Looking at your numbers it says there are 101,400 slice LUTs in the FPGA. Of this, only 35,000 can be used as memory, but all can be used as logic. Your design is trying to use 107,195 as logic and 4,727 as memory - thus a total of 111,922 of the 101,400 are used.

This is WAY too much for the device. Vivado is much better than ISE at getting high LUT utilizations, but even at that you should not be targetting more than 85% utilization - you can get a bit more, but it starts getting very difficult to meet timing at higher utilizations.

You either have to choose a larger device of simplify your design so that it doesn't use as many LUTs. You may be able to do some recoding that will allow some LUT based logic to be moved to block RAMs (some state machines can) and/or DSP slices (although you are using a good number of DSPs already), but I doubt that this is going to be enough to get this to fit in your device.