前言

我的上一篇文章中談到,如何使能mt7620的第二個spi介面.既然第二個spi介面已經開放成功,那麼,可否接著新增第三個、第四個spi介面呢?熟悉mt7620硬體的朋友一定會第一時間站出來反對我:怎麼可能!?mt7620總共才兩個spi介面,怎麼可能新增更多呢?除非在硬體上想辦法.然而我總是善於將不可能變為可能^_,今天我就要和大家分享一下,如何不改動任何硬體,通過修改驅動的方法,實現多個spi介面.注意,我這裡實現的spi,並非用gpio口模擬的bitbang偽spi,而是基於硬體spi的真實介面.

背景知識

眾所周知,mt7620有兩個獨立的硬體spi介面,且對應的片選cs為cs0與cs1.如果讀者朋友對spi匯流排的通訊協議略懂的話,會發現:spi的通訊是按照message的方式來進行的,一次通訊過程是通過transfer_one_message的方法來實現.實際上是對spi硬體介面的分時複用.如果我們能夠找到辦法,擴充一下cs片選訊號,且保留對spi硬體的分時複用,不就可以完美實現我們的目標了?那麼問題來了:如何擴充cs片選?如何讓spi硬體不產生衝突?具體如何實現?各位看官莫急,且聽我慢慢道來.

實現過程

dts檔案的奧祕

dts檔案中有很多隱藏關卡,通過簡單的改動,就可以讓spi憑空多出cs片選來.

// manfeel, try to add more cs pins(>2)
#define M(cs) (cs ? 1 : cs)
#define RAMIPS_SPI_STAT(cs)        (0x00 + (M(cs) * RAMIPS_SPI_DEV_OFFSET))
#define RAMIPS_SPI_CFG(cs)        (0x10 + (M(cs) * RAMIPS_SPI_DEV_OFFSET))
#define RAMIPS_SPI_CTL(cs)        (0x14 + (M(cs) * RAMIPS_SPI_DEV_OFFSET))
#define RAMIPS_SPI_DATA(cs)        (0x20 + (M(cs) * RAMIPS_SPI_DEV_OFFSET))
#define RAMIPS_SPI_FIFO_STAT(cs)    (0x38 + (M(cs) * RAMIPS_SPI_DEV_OFFSET))
 

也就是說,當cs>=1的時候,第二個spi介面負責所有的通訊工作.

改動rt2880_spi_setup

static void rt2880_spi_set_cs(struct spi_device *spi, int enable)
{
    struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
    int cs = spi->chip_select;
    // manfeel, deal cs_gpio first
    if (spi->cs_gpio >= 0) {
        /* SPI is normally active-low */
        gpio_set_value_cansleep(spi->cs_gpio, (spi->mode & SPI_CS_HIGH) ? enable : !enable);
    } else {
        if (enable)
            rt2880_spi_clrbits(rs, RAMIPS_SPI_CTL(cs), SPICTL_SPIENA);
        else
            rt2880_spi_setbits(rs, RAMIPS_SPI_CTL(cs), SPICTL_SPIENA);
    }
}
 

總共新增不到20行程式碼,就實現了N個spi介面!

實驗

將三個不同的spi flash同時連線到開發板上:
cs0連線w25q256
cs1連線s25sl032p
cs2(gpio72,亦即WLED_GPIO)連線en25p64
上電開機,觀察TTL輸出,能夠看到如下內容:

[    0.570000] m25p80 spi32766.0: r=0, sreg3=0
[    0.570000] m25p80 spi32766.0: w25q256 (32768 Kbytes)
[    0.580000] 4 ofpart partitions found on MTD device spi32766.0
[    0.600000] Creating 4 MTD partitions on "spi32766.0":
[    0.600000] 0x000000000000-0x000000030000 : "u-boot"
[    0.620000] 0x000000030000-0x000000040000 : "u-boot-env"
[    0.620000] 0x000000040000-0x000000050000 : "factory"
[    0.640000] 0x000000050000-0x000002000000 : "firmware"
[    0.740000] 2 uimage-fw partitions found on MTD device firmware
[    0.760000] 0x000000050000-0x0000001de092 : "kernel"
[    0.760000] mtd: partition "kernel" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
[    0.760000] 0x0000001de092-0x000002000000 : "rootfs"
[    0.760000] mtd: partition "rootfs" must either start or end on erase block boundary or be smaller than an erase block -- forcing read-only
[    0.760000] mtd: device 5 (rootfs) set to be root filesystem
[    0.760000] 1 squashfs-split partitions found on MTD device rootfs
[    0.760000] 0x000000470000-0x000002000000 : "rootfs_data"
[    0.760000] m25p80 spi32766.1: r=0, sreg3=0
[    0.760000] m25p80 spi32766.1: found s25sl032p, expected w25q256
[    0.760000] m25p80 spi32766.1: s25sl032p (4096 Kbytes)
[    0.760000] 1 ofpart partitions found on MTD device spi32766.1
[    0.760000] Creating 1 MTD partitions on "spi32766.1":
[    0.760000] 0x000000000000-0x000002000000 : "edisk1"
[    0.760000] mtd: partition "edisk1" extends beyond the end of device "spi32766.1" -- size truncated to 0x400000
[    0.760000] spi-rt2880 10000b00.spi: in rt2880_spi_setup, cs_gpio = 72, status = 0
[    0.760000] m25p80 spi32766.2: r=0, sreg3=0
[    0.760000] m25p80 spi32766.2: found en25p64, expected w25q256
[    0.760000] m25p80 spi32766.2: en25p64 (8192 Kbytes)
[    0.760000] 1 ofpart partitions found on MTD device spi32766.2
[    0.760000] Creating 1 MTD partitions on "spi32766.2":
[    0.760000] 0x000000000000-0x000002000000 : "edisk2"
[    0.760000] mtd: partition "edisk2" extends beyond the end of device "spi32766.2" -- size truncated to 0x800000

總結

通過新增cs-gpios的方式實現了N個spi介面,鑑於spi介面的簡單高效與靈活,大大加強了mt7620晶片的戰鬥力.以後,可以在mt7620上新增spi介面的各種裝置,而不需要有spi介面不夠的顧慮了.