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ZYNQ PL-PS中斷

硬體:Xilinx Zynq-7000 SoC ZC706

版本:vivado2015.4

目的:PL觸發中斷,PS做中斷處理

PL部分

新增兩個中斷源,一個普通中斷,一個FIQ中斷,對應中斷號為61和28

連線圖

約束

set_property PACKAGE_PIN AK25  [get_ports {SW1[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {SW1[0]}]

set_property PACKAGE_PIN R27  [get_ports {SW2[0]}]
set_property IOSTANDARD LVCMOS18 [get_ports {SW2[0]}]

 PS部分

註冊一個普通中斷和一個快速中斷,普通中斷設定為上升沿觸發

#include <stdio.h>
#include "xscugic.h"
#include "xil_exception.h"
#include "xgpiops.h"
#include "xil_printf.h"
XGpioPs Gpio;

#define KEY_INT_ID 61
#define CPU_BASEADDR		XPAR_SCUGIC_CPU_BASEADDR

XScuGic ScuGic;
void irq_handler(void * data) {
	u32 id;
	id = XScuGic_ReadReg(CPU_BASEADDR, XSCUGIC_INT_ACK_OFFSET);
	id = id & XSCUGIC_ACK_INTID_MASK;
	xil_printf("irq ocurr,id:%d\n", id);
	XScuGic_WriteReg(CPU_BASEADDR, XSCUGIC_EOI_OFFSET, id);

}

void fiq_request(void) {
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_FIQ_INT,
			(Xil_ExceptionHandler) irq_handler, (void *) 2);

	Xil_ExceptionEnableMask(XIL_EXCEPTION_ALL);
}

void normal_irq_request() {

	XScuGic_Config* pScuGicCfg;
	pScuGicCfg = XScuGic_LookupConfig(XPAR_SCUGIC_SINGLE_DEVICE_ID);
	XScuGic_CfgInitialize(&ScuGic, pScuGicCfg, pScuGicCfg->CpuBaseAddress);
	XScuGic_Connect(&ScuGic, KEY_INT_ID, (Xil_ExceptionHandler) irq_handler, 0);
	XScuGic_SetPriorityTriggerType(&ScuGic, KEY_INT_ID, 0xA0, 3);
	XScuGic_Enable(&ScuGic, KEY_INT_ID);

	Xil_ExceptionInit();
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
			(Xil_ExceptionHandler) irq_handler, &ScuGic);

	Xil_ExceptionEnable();


}

int main(void) {
	xil_printf("PL int test\n\r");
	normal_irq_request();
	fiq_request();
	while (1);
	return 0;
}

實驗結果

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